石墨烯介导晶片键合制备高性能纳米光电子用单层芯双异质结构

2017 5th International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D) Pub Date : 2017-05-01 DOI:10.23919/LTB-3D.2017.7947474

T. Naito, K. Tanabe

{"title":"石墨烯介导晶片键合制备高性能纳米光电子用单层芯双异质结构","authors":"T. Naito, K. Tanabe","doi":"10.23919/LTB-3D.2017.7947474","DOIUrl":null,"url":null,"abstract":"We have fabricated for the first time a monolayer-cored double heterostructure, towards the realization of high-efficiency nanooptoelectronic devices. We prepared a Si/graphene/Si stack by means of graphene-mediated wafer bonding and verified the interfacial mechanical stability and interlayer electrical connection, demonstrating a new application of wafer bonding.","PeriodicalId":183993,"journal":{"name":"2017 5th International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Graphene-mediated wafer bonding to prepare monolayer-cored double heterostructures for high-performance nanooptoelectronics\",\"authors\":\"T. Naito, K. Tanabe\",\"doi\":\"10.23919/LTB-3D.2017.7947474\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We have fabricated for the first time a monolayer-cored double heterostructure, towards the realization of high-efficiency nanooptoelectronic devices. We prepared a Si/graphene/Si stack by means of graphene-mediated wafer bonding and verified the interfacial mechanical stability and interlayer electrical connection, demonstrating a new application of wafer bonding.\",\"PeriodicalId\":183993,\"journal\":{\"name\":\"2017 5th International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D)\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 5th International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/LTB-3D.2017.7947474\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 5th International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/LTB-3D.2017.7947474","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 1

摘要

我们首次制备了一种单层芯双异质结构，为实现高效率的纳米光电器件奠定了基础。我们通过石墨烯介导的晶圆键合制备了Si/石墨烯/Si堆叠，并验证了界面的机械稳定性和层间的电气连接，展示了晶圆键合的新应用。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Graphene-mediated wafer bonding to prepare monolayer-cored double heterostructures for high-performance nanooptoelectronics

We have fabricated for the first time a monolayer-cored double heterostructure, towards the realization of high-efficiency nanooptoelectronic devices. We prepared a Si/graphene/Si stack by means of graphene-mediated wafer bonding and verified the interfacial mechanical stability and interlayer electrical connection, demonstrating a new application of wafer bonding.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2017 5th International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D)

自引率

0.00%

发文量