H. Yoshida, H. Suzuki, Y. Kinoshita, K. Imai, T. Akimoto, K. Tokashiki, T. Yamazaki
{"title":"采用沟槽集电极的低工艺复杂度BiCMOS工艺集成技术","authors":"H. Yoshida, H. Suzuki, Y. Kinoshita, K. Imai, T. Akimoto, K. Tokashiki, T. Yamazaki","doi":"10.1109/BIPOL.1994.587901","DOIUrl":null,"url":null,"abstract":"A BiCMOS process integration technology featuring a W-plug trench collector sink simultaneously formed with an emitter defining step is presented. This technology can provide a low resistance collector sink without any additional process steps to form the collector sink and realizes a low cost 0.35 /spl mu/m BiCMOS device with only 11 photo-masks.","PeriodicalId":373721,"journal":{"name":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"157 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Process integration technology for low process complexity BiCMOS using trench collector sink\",\"authors\":\"H. Yoshida, H. Suzuki, Y. Kinoshita, K. Imai, T. Akimoto, K. Tokashiki, T. Yamazaki\",\"doi\":\"10.1109/BIPOL.1994.587901\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A BiCMOS process integration technology featuring a W-plug trench collector sink simultaneously formed with an emitter defining step is presented. This technology can provide a low resistance collector sink without any additional process steps to form the collector sink and realizes a low cost 0.35 /spl mu/m BiCMOS device with only 11 photo-masks.\",\"PeriodicalId\":373721,\"journal\":{\"name\":\"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting\",\"volume\":\"157 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-10-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/BIPOL.1994.587901\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BIPOL.1994.587901","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Process integration technology for low process complexity BiCMOS using trench collector sink
A BiCMOS process integration technology featuring a W-plug trench collector sink simultaneously formed with an emitter defining step is presented. This technology can provide a low resistance collector sink without any additional process steps to form the collector sink and realizes a low cost 0.35 /spl mu/m BiCMOS device with only 11 photo-masks.