D. Ingerly, A. Agrawal, R. Ascázubi, A. Blattner, M. Buehler, V. Chikarmane, B. Choudhury, F. Cinnor, C. Ege, C. Ganpule, T. Glassman, R. Grover, P. Hentges, J. Hicks, D. Jones, A. Kandas, H. Khan, N. Lazo, K. Lee, H. Liu, A. Madhavan, R. McFadden, T. Mule, D. Parsons, P. Parthangal, S. Rangaraj, D. Rao, J. Roesler, A. Schmitz, M. Sharma, J. Shin, Y. Shusterman, N. Speer, P. Tiwari, G. Wang, P. Yashar, K. Mistry
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Low-k interconnect stack with metal-insulator-metal capacitors for 22nm high volume manufacturing
We describe interconnect features for Intel's 22nm high-performance logic technology, with metal-insulator-metal capacitors and nine layers of interconnects. Metal-1 through Metal-6 feature a new ultra-low-k carbon doped oxide (CDO) and a low-k etch stop. Metal-7 and Metal-8 use a low-k CDO. New materials and process optimization provide 13-18% capacitance improvement. Single-exposure patterning for 80nm pitch layers makes the process cost-effective.
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