倒装芯片技术

2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT) Pub Date : 2010-11-01 DOI:10.1109/IEMT.2010.5746775

Y. Tsukada

{"title":"倒装芯片技术","authors":"Y. Tsukada","doi":"10.1109/IEMT.2010.5746775","DOIUrl":null,"url":null,"abstract":"2. Elements of design and manufacturing Chip and carrier bumping Joint and substrate Underfill and cooling 3. Packaging configuration BGA and SiP (MCM) Wafer Level package Known Good Die 4. Reliability and life Stress test and life estimation Typical failure mode Failures factorial analysis 5. Current issues for density increase Thermal stress Joint fatigue life Joint electro-migration 6. Requirement for new materials and future direction 2D packaging joint and substrate 3D chip stack packaging Optical/Electrical packaging 7. Japanese packaging technology trend (Special Topics) SiP, WLP, PoP, Embedded component Product miniaturization.","PeriodicalId":133127,"journal":{"name":"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"20","resultStr":"{\"title\":\"Flip chip technology\",\"authors\":\"Y. Tsukada\",\"doi\":\"10.1109/IEMT.2010.5746775\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"2. Elements of design and manufacturing Chip and carrier bumping Joint and substrate Underfill and cooling 3. Packaging configuration BGA and SiP (MCM) Wafer Level package Known Good Die 4. Reliability and life Stress test and life estimation Typical failure mode Failures factorial analysis 5. Current issues for density increase Thermal stress Joint fatigue life Joint electro-migration 6. Requirement for new materials and future direction 2D packaging joint and substrate 3D chip stack packaging Optical/Electrical packaging 7. Japanese packaging technology trend (Special Topics) SiP, WLP, PoP, Embedded component Product miniaturization.\",\"PeriodicalId\":133127,\"journal\":{\"name\":\"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"20\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.2010.5746775\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.2010.5746775","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 20

摘要

2. 芯片与载体碰撞接头与基板的下填与冷却封装配置BGA和SiP (MCM)晶圆级封装可靠性与寿命应力测试与寿命估计典型失效模式失效因子分析目前存在的问题为密度增加热应力接头疲劳寿命接头电迁移对新材料的需求和未来发展方向2D封装接头和基板3D芯片堆叠封装光学/电气封装日本封装技术趋势(专题):SiP、WLP、PoP、嵌入式元件产品小型化。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Flip chip technology

2. Elements of design and manufacturing Chip and carrier bumping Joint and substrate Underfill and cooling 3. Packaging configuration BGA and SiP (MCM) Wafer Level package Known Good Die 4. Reliability and life Stress test and life estimation Typical failure mode Failures factorial analysis 5. Current issues for density increase Thermal stress Joint fatigue life Joint electro-migration 6. Requirement for new materials and future direction 2D packaging joint and substrate 3D chip stack packaging Optical/Electrical packaging 7. Japanese packaging technology trend (Special Topics) SiP, WLP, PoP, Embedded component Product miniaturization.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)

自引率

0.00%

发文量