J. Bastos, M. Steyaert, R. Roovers, P. Kinget, Willy Sansen, B. Graindourze, A. Pergoot, E. Janssens
{"title":"小尺寸MOS晶体管的失配特性","authors":"J. Bastos, M. Steyaert, R. Roovers, P. Kinget, Willy Sansen, B. Graindourze, A. Pergoot, E. Janssens","doi":"10.1109/ICMTS.1995.513986","DOIUrl":null,"url":null,"abstract":"A test chip for characterization of transistor mismatch in a standard 1.2 /spl mu/m CMOS technology is presented. A new algorithm for matching parameter extraction has been used. Mismatch parameters based on measurements on 12000 nMOS and 10000 pMOS transistors have been extracted. It is observed that the threshold voltage mismatch linear dependency on the inverse of the square root of the effective channel area no longer holds for transistors of 1.2 /spl mu/m channel length. An extended model based on the physical causes of threshold voltage mismatch is proposed.","PeriodicalId":432935,"journal":{"name":"Proceedings International Conference on Microelectronic Test Structures","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"89","resultStr":"{\"title\":\"Mismatch characterization of small size MOS transistors\",\"authors\":\"J. Bastos, M. Steyaert, R. Roovers, P. Kinget, Willy Sansen, B. Graindourze, A. Pergoot, E. Janssens\",\"doi\":\"10.1109/ICMTS.1995.513986\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A test chip for characterization of transistor mismatch in a standard 1.2 /spl mu/m CMOS technology is presented. A new algorithm for matching parameter extraction has been used. Mismatch parameters based on measurements on 12000 nMOS and 10000 pMOS transistors have been extracted. It is observed that the threshold voltage mismatch linear dependency on the inverse of the square root of the effective channel area no longer holds for transistors of 1.2 /spl mu/m channel length. An extended model based on the physical causes of threshold voltage mismatch is proposed.\",\"PeriodicalId\":432935,\"journal\":{\"name\":\"Proceedings International Conference on Microelectronic Test Structures\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-03-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"89\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings International Conference on Microelectronic Test Structures\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMTS.1995.513986\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Conference on Microelectronic Test Structures","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS.1995.513986","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 89
摘要
提出了一种标准1.2 /spl μ m CMOS工艺中晶体管失配特性的测试芯片。提出了一种新的匹配参数提取算法。基于对12000个nMOS和10000个pMOS晶体管的测量,提取了失配参数。可以观察到,对于通道长度为1.2 /spl mu/m的晶体管,阈值电压失配线性依赖于有效通道面积平方根的倒数不再成立。提出了一种基于阈值电压失配物理原因的扩展模型。
Mismatch characterization of small size MOS transistors
A test chip for characterization of transistor mismatch in a standard 1.2 /spl mu/m CMOS technology is presented. A new algorithm for matching parameter extraction has been used. Mismatch parameters based on measurements on 12000 nMOS and 10000 pMOS transistors have been extracted. It is observed that the threshold voltage mismatch linear dependency on the inverse of the square root of the effective channel area no longer holds for transistors of 1.2 /spl mu/m channel length. An extended model based on the physical causes of threshold voltage mismatch is proposed.