{"title":"自动合成可配置的二维线性反馈移位寄存器随机/嵌入式测试模式","authors":"C. Chen, K. George","doi":"10.1109/ISQED.2003.1194718","DOIUrl":null,"url":null,"abstract":"A new approach to optimize a configurable two-dimensional (2-D) linear feedback shift registers (LFSR) for both embedded and random test pattern generation in built-in self-test (BIST) is proposed. This configurable 2-D LFSR based test pattern generator generates: 1) a deterministic sequence of test patterns for random-pattern-resistant faults, and then 2) random patterns for random-pattern-detectable faults. The configurable 2-D LFSR test generator can be adopted in two basic BIST execution options: test-per-clock (parallel BIST) and test-per-scan (serial BIST). Experimental results of test-per-clock BIST for benchmark circuits show with the configurable scheme the number of flip-flops of 2-D LFSR is reduced by 79%. The average number of faults detected by configurable 2-D LFSR is 9.27% higher than the conventional LFSR. Experimental results of test-per-scan BIST for benchmark circuits demonstrate the effectiveness of the proposed technique in which high fault coverage can be achieved.","PeriodicalId":448890,"journal":{"name":"Fourth International Symposium on Quality Electronic Design, 2003. Proceedings.","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Automated synthesis of configurable two-dimensional linear feedback shifter registers for random/embedded test patterns\",\"authors\":\"C. Chen, K. George\",\"doi\":\"10.1109/ISQED.2003.1194718\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new approach to optimize a configurable two-dimensional (2-D) linear feedback shift registers (LFSR) for both embedded and random test pattern generation in built-in self-test (BIST) is proposed. This configurable 2-D LFSR based test pattern generator generates: 1) a deterministic sequence of test patterns for random-pattern-resistant faults, and then 2) random patterns for random-pattern-detectable faults. The configurable 2-D LFSR test generator can be adopted in two basic BIST execution options: test-per-clock (parallel BIST) and test-per-scan (serial BIST). Experimental results of test-per-clock BIST for benchmark circuits show with the configurable scheme the number of flip-flops of 2-D LFSR is reduced by 79%. The average number of faults detected by configurable 2-D LFSR is 9.27% higher than the conventional LFSR. Experimental results of test-per-scan BIST for benchmark circuits demonstrate the effectiveness of the proposed technique in which high fault coverage can be achieved.\",\"PeriodicalId\":448890,\"journal\":{\"name\":\"Fourth International Symposium on Quality Electronic Design, 2003. Proceedings.\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-03-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Fourth International Symposium on Quality Electronic Design, 2003. Proceedings.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISQED.2003.1194718\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Fourth International Symposium on Quality Electronic Design, 2003. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2003.1194718","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Automated synthesis of configurable two-dimensional linear feedback shifter registers for random/embedded test patterns
A new approach to optimize a configurable two-dimensional (2-D) linear feedback shift registers (LFSR) for both embedded and random test pattern generation in built-in self-test (BIST) is proposed. This configurable 2-D LFSR based test pattern generator generates: 1) a deterministic sequence of test patterns for random-pattern-resistant faults, and then 2) random patterns for random-pattern-detectable faults. The configurable 2-D LFSR test generator can be adopted in two basic BIST execution options: test-per-clock (parallel BIST) and test-per-scan (serial BIST). Experimental results of test-per-clock BIST for benchmark circuits show with the configurable scheme the number of flip-flops of 2-D LFSR is reduced by 79%. The average number of faults detected by configurable 2-D LFSR is 9.27% higher than the conventional LFSR. Experimental results of test-per-scan BIST for benchmark circuits demonstrate the effectiveness of the proposed technique in which high fault coverage can be achieved.