一种用于超宽带无线接收系统的阻抗反馈CMOS低噪声放大器

2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT) Pub Date : 2008-04-23 DOI:10.1109/VDAT.2008.4542410

Zhe-Yang Huang, Che-Cheng Huang, Chun-Chieh Chen, C. Hung, C. Jou

{"title":"一种用于超宽带无线接收系统的阻抗反馈CMOS低噪声放大器","authors":"Zhe-Yang Huang, Che-Cheng Huang, Chun-Chieh Chen, C. Hung, C. Jou","doi":"10.1109/VDAT.2008.4542410","DOIUrl":null,"url":null,"abstract":"In this paper, a CMOS low-noise amplifier (LNA) is designed for ultra-wideband (UWB) wireless receiver system. The design consists of a wideband input impedance matching network, a cascoded amplifier with shunt-peaked load, a RLC-impedance feedback loop and an output buffer for measurement purpose. It is fabricated in TSMC 0.18 um standard RF CMOS process. The LNA gives 11.5 dB maximum power gain between 3.1 GHz-5.0 GHz while consuming 5.7 mW through a 1.8 V supply voltage. Over the 3.1 GHz-5.0 GHz frequency band, the minimum noise figure (NF) is 4.7 dB. Input return loss lower than -12.7 dB in all bandwidth have been achieved.","PeriodicalId":156790,"journal":{"name":"2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-04-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A CMOS low-noise amplifier with impedance feedback for ultra-wideband wireless receiver system\",\"authors\":\"Zhe-Yang Huang, Che-Cheng Huang, Chun-Chieh Chen, C. Hung, C. Jou\",\"doi\":\"10.1109/VDAT.2008.4542410\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a CMOS low-noise amplifier (LNA) is designed for ultra-wideband (UWB) wireless receiver system. The design consists of a wideband input impedance matching network, a cascoded amplifier with shunt-peaked load, a RLC-impedance feedback loop and an output buffer for measurement purpose. It is fabricated in TSMC 0.18 um standard RF CMOS process. The LNA gives 11.5 dB maximum power gain between 3.1 GHz-5.0 GHz while consuming 5.7 mW through a 1.8 V supply voltage. Over the 3.1 GHz-5.0 GHz frequency band, the minimum noise figure (NF) is 4.7 dB. Input return loss lower than -12.7 dB in all bandwidth have been achieved.\",\"PeriodicalId\":156790,\"journal\":{\"name\":\"2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT)\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-04-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VDAT.2008.4542410\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2008.4542410","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

本文设计了一种用于超宽带无线接收系统的CMOS低噪声放大器(LNA)。该设计包括一个宽带输入阻抗匹配网络、一个带并联峰值负载的级联放大器、一个rlc阻抗反馈环路和一个用于测量的输出缓冲器。采用台积电0.18 um标准射频CMOS工艺制造。LNA在3.1 GHz-5.0 GHz范围内提供11.5 dB的最大功率增益，而在1.8 V电源电压下消耗5.7 mW。在3.1 GHz ~ 5.0 GHz频段内，最小噪声系数为4.7 dB。在所有带宽下均实现了低于-12.7 dB的输入回波损耗。

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A CMOS low-noise amplifier with impedance feedback for ultra-wideband wireless receiver system

In this paper, a CMOS low-noise amplifier (LNA) is designed for ultra-wideband (UWB) wireless receiver system. The design consists of a wideband input impedance matching network, a cascoded amplifier with shunt-peaked load, a RLC-impedance feedback loop and an output buffer for measurement purpose. It is fabricated in TSMC 0.18 um standard RF CMOS process. The LNA gives 11.5 dB maximum power gain between 3.1 GHz-5.0 GHz while consuming 5.7 mW through a 1.8 V supply voltage. Over the 3.1 GHz-5.0 GHz frequency band, the minimum noise figure (NF) is 4.7 dB. Input return loss lower than -12.7 dB in all bandwidth have been achieved.

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来源期刊

2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT)

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