基于sub- 32nm双栅MOS技术的创新6T混合SRAM单元

A. Amara, B. Giraud, O. Thomas
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引用次数: 3

摘要

本文提出了一种基于双栅MOS技术的新型SRAM存储单元。它是一种可重构的6T-4T,利用了6T和4T SRAM单元的优势。与传统的6T SRAM单元相比,该单元在不增加任何晶体管或外部信号的情况下提高了读取稳定性和可写性。写入能力提高了64%,读取模式稳定性提高了70%,同时保留模式稳定性略有提高。由于其优异的稳定性和对工艺变化的良好不敏感性(δ/μµ4和低2倍),所提出的架构也是低压应用的有希望的候选者。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An Innovative 6T Hybrid SRAM Cell in sub-32 nm Double-Gate MOS Technology
This paper presents a new SRAM memory cell in Double Gate MOS technology. It’s a reconfigurable 6T-4T that takes benefit of the advantages of both 6T and 4T SRAM cells. The cell improves both read stability and write-ability, without adding any transistor or external signal, compared to conventional 6T SRAM cell. The write ability is improved by a factor of 64% and the stability in read mode by a factor of 70% while slightly increasing the stability in retention mode. Thanks to its excellent stability and good insensitivity to process variations (δ/μµ 4 and 2 times lower), the proposed architecture is also a promising candidate for low voltage applications.
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