{"title":"一种MOS晶体管电容特性测试芯片","authors":"R. Lorival, P. Nouet","doi":"10.1109/ICMTS.1995.513961","DOIUrl":null,"url":null,"abstract":"We present test chip for the capacitive characterization of MOS transistors. It allows one to measure accurately capacitances of the transistor and to identify the various components (i.e. gate-source, gate-bulk and gate-drain). From capacitance measurements, it is then possible to determine effective dimensions of the transistor (length and width) as well as gate oxide thickness. As Test Structures enable the measurement of very small capacitances, minimum dimension transistors are studied.","PeriodicalId":432935,"journal":{"name":"Proceedings International Conference on Microelectronic Test Structures","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A test chip for MOS transistor capacitance characterization\",\"authors\":\"R. Lorival, P. Nouet\",\"doi\":\"10.1109/ICMTS.1995.513961\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present test chip for the capacitive characterization of MOS transistors. It allows one to measure accurately capacitances of the transistor and to identify the various components (i.e. gate-source, gate-bulk and gate-drain). From capacitance measurements, it is then possible to determine effective dimensions of the transistor (length and width) as well as gate oxide thickness. As Test Structures enable the measurement of very small capacitances, minimum dimension transistors are studied.\",\"PeriodicalId\":432935,\"journal\":{\"name\":\"Proceedings International Conference on Microelectronic Test Structures\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-03-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings International Conference on Microelectronic Test Structures\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMTS.1995.513961\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Conference on Microelectronic Test Structures","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS.1995.513961","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A test chip for MOS transistor capacitance characterization
We present test chip for the capacitive characterization of MOS transistors. It allows one to measure accurately capacitances of the transistor and to identify the various components (i.e. gate-source, gate-bulk and gate-drain). From capacitance measurements, it is then possible to determine effective dimensions of the transistor (length and width) as well as gate oxide thickness. As Test Structures enable the measurement of very small capacitances, minimum dimension transistors are studied.