T. Ogura, T. Yamamoto, Y. Saito, Y. Hayashi, T. Mogami
{"title":"用于亚四分之一微米CMOS技术的带有SiN保护环的浅沟槽隔离","authors":"T. Ogura, T. Yamamoto, Y. Saito, Y. Hayashi, T. Mogami","doi":"10.1109/VLSIT.1998.689260","DOIUrl":null,"url":null,"abstract":"Shallow trench isolation (STI) technology is important to realize high-speed and high-packing-density CMOS-LSIs. A new SiN guard-ring on the upper edge of filled SiO/sub 2/ for steep-sidewall STI is proposed and evaluated to improve the reverse narrow channel effect and device reliability. Good isolation characteristics and sufficient improvement of the reverse narrow channel effect are achieved for STI with SiN guard-ring structure.","PeriodicalId":402365,"journal":{"name":"1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216)","volume":"124 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"A shallow trench isolation with SiN guard-ring for sub-quarter micron CMOS technologies\",\"authors\":\"T. Ogura, T. Yamamoto, Y. Saito, Y. Hayashi, T. Mogami\",\"doi\":\"10.1109/VLSIT.1998.689260\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Shallow trench isolation (STI) technology is important to realize high-speed and high-packing-density CMOS-LSIs. A new SiN guard-ring on the upper edge of filled SiO/sub 2/ for steep-sidewall STI is proposed and evaluated to improve the reverse narrow channel effect and device reliability. Good isolation characteristics and sufficient improvement of the reverse narrow channel effect are achieved for STI with SiN guard-ring structure.\",\"PeriodicalId\":402365,\"journal\":{\"name\":\"1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216)\",\"volume\":\"124 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-06-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.1998.689260\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1998.689260","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A shallow trench isolation with SiN guard-ring for sub-quarter micron CMOS technologies
Shallow trench isolation (STI) technology is important to realize high-speed and high-packing-density CMOS-LSIs. A new SiN guard-ring on the upper edge of filled SiO/sub 2/ for steep-sidewall STI is proposed and evaluated to improve the reverse narrow channel effect and device reliability. Good isolation characteristics and sufficient improvement of the reverse narrow channel effect are achieved for STI with SiN guard-ring structure.