65纳米块体CMOS工艺中栅极-硅化和栅极-非硅化、漏极/源极-硅化阻流ESD nmosfet失效机理分析

2006 13th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2006-07-03 DOI:10.1109/IPFA.2006.251045

J. Li, D. Alvarez, K. Chatty, M. Abou-Khalil, R. Gauthier, C. Russ, C. Seguin, R. Halbach

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引用次数: 23

摘要

采用65nm块体CMOS技术对栅极-硅化(GS)和栅极-非硅化(GNS) ESD nmosfet进行的电学和扫描电镜分析表明，当硅化物阻断的漏极/源极与多晶硅栅极之间的硅化作用得以避免时，失效机制从经典的漏极-源细丝转变为经典的漏极-源细丝。对于2.5V厚的氧化物器件，观察到漏极-衬底结短路，而对于1.0V薄的氧化物器件，发生栅极-氧化物击穿失效

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Analysis of Failure Mechanism on Gate-Silicided and Gate-Non-Silicided, Drain/Source Silicide-blocked ESD NMOSFETs in a 65nm Bulk CMOS Technology

Electrical and SEM analysis of gate-silicided (GS) and gate-non-silicided (GNS) ESD NMOSFETs in a 65nm bulk CMOS technology show that the failure mechanism switches away from classical drain-to-source filamentation when the silicidation between the silicide-blocked drain/source and the polysilicon gate is avoided. For 2.5V thick oxide devices, drain-to-substrate junction shorting was observed, whereas, for 1.0V thin oxide devices, gate-oxide breakdown failure occurred

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2006 13th International Symposium on the Physical and Failure Analysis of Integrated Circuits

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