铜电镀工艺中大马士革特征填料的优化

Proceedings of the IEEE 1999 International Interconnect Technology Conference (Cat. No.99EX247) Pub Date : 1999-05-26 DOI:10.1109/IITC.1999.787145

J. Reid, V. Bhaskaran, R. Contolini, E. Patton, R. Jackson, E. Broadbent, T. Walsh, S. Mayer, R. Schetty, J. Martin, M. Toben, S. Menard

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引用次数: 10

摘要

适合常规集成电路制造使用的铜电镀工艺必须提供可重复地填充深，窄的大马士革特征的铜膜。本文考察了种子层覆盖、电镀波形(直流、反脉冲)和添加剂化学配方等因素对消除填充结构中局部空洞缺陷的影响。两步直流电镀和定制添加剂化学相结合，实现了9:1宽高比(AR) (0.13 /spl mu/m沟槽)和5:1宽高比(AR) (0.18 /spl mu/m孔)的完全填充。

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Optimization of damascene feature fill for copper electroplating process

A copper electroplating process suitable for routine IC manufacturing use must deliver Cu films that reproducibly fill deep, narrow damascene features. In this paper, several important factors such as seed layer coverage, plating waveform (DC, reversed-pulse), and additive chemistry formulation were examined in terms of their effect on the elimination of localized void defects within filled structures. A combination of two-step DC plating and custom additive chemistry enabling complete fill of 9:1 aspect ratio (AR), 0.13 /spl mu/m trenches and 5:1 AR, 0.18 /spl mu/m vias was accomplished.

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Proceedings of the IEEE 1999 International Interconnect Technology Conference (Cat. No.99EX247)

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