S. Mittl, A. Swift, E. Wu, D. Ioannou, Fen Chen, G. Massey, N. Rahim, M. Hauser, P. Hyde, J. Lukaitis, S. Rauch, S. Saroop, Yanfeng Wang
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引用次数: 5
摘要
介绍了采用栅极优先高k金属栅极和嵌入式高k金属填充DRAM的高性能32nm SOI CMOS技术的可靠性特性。该技术具有高性能0.9V薄介质器件和1.5V厚介质I/O器件。包括热载流子、偏置温度、平面和沟槽节点TDDB、栅极到触点、硅eFUSE、SER、SRAM和逻辑电路可靠性评估的结果。
Reliability characterization of 32nm high-k metal gate SOI technology with embedded DRAM
The reliability characterization of a high performance 32nm SOI CMOS technology featuring gate first High-K Metal Gate and embedded High-K Metal Fill DRAM is presented. This technology features high performance 0.9V thin dielectric devices and 1.5V thick dielectric I/O devices. Included are results of Hot Carrier, Bias Temperature, Planar and Trench Node TDDB, Gate to Contact, silicon eFUSE, SER, SRAM and Logic circuit reliability evaluations.
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