{"title":"铜柱FCQFN的高通量制样方法","authors":"Ke-Ying Lin, Wenjing Wang, Sharon Chen","doi":"10.1109/IPFA.2016.7564261","DOIUrl":null,"url":null,"abstract":"We present a fast and high-throughput sample preparation method for FA (failure analysis) of Cu pillar FCQFN package. Our method facilitates simultaneous decapsulation of multiple devices, and with reduced number of package decapsulation steps. Further, throughput-time (TPT) for sample preparation is reduced from 90 min to 30 min.","PeriodicalId":206237,"journal":{"name":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"High-throughput sample preparation method for Cu pillar FCQFN\",\"authors\":\"Ke-Ying Lin, Wenjing Wang, Sharon Chen\",\"doi\":\"10.1109/IPFA.2016.7564261\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present a fast and high-throughput sample preparation method for FA (failure analysis) of Cu pillar FCQFN package. Our method facilitates simultaneous decapsulation of multiple devices, and with reduced number of package decapsulation steps. Further, throughput-time (TPT) for sample preparation is reduced from 90 min to 30 min.\",\"PeriodicalId\":206237,\"journal\":{\"name\":\"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"volume\":\"150 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-07-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA.2016.7564261\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2016.7564261","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High-throughput sample preparation method for Cu pillar FCQFN
We present a fast and high-throughput sample preparation method for FA (failure analysis) of Cu pillar FCQFN package. Our method facilitates simultaneous decapsulation of multiple devices, and with reduced number of package decapsulation steps. Further, throughput-time (TPT) for sample preparation is reduced from 90 min to 30 min.