{"title":"SRAM单元的动态数据稳定性及其对数据稳定性测试的影响","authors":"M. Sharifkhani, S. Jahinuzzaman, M. Sachdev","doi":"10.1109/MTDT.2006.12","DOIUrl":null,"url":null,"abstract":"The paper discusses the concept of dynamic data stability in the SRAM cells. It is shown that the criteria for the absolute static data stability in an SRAM cell is a sub-set of its dynamic data stability. Hence, test methods that are based on dynamic stress of the cell have limited success in discovering the defective cells. Hammer test, for example, fails to discover the faults in an SRAM cell when it is data stable in the dynamic sense but not statically data stable. It will be shown that a long cell access time can detect such faults as it reduces the effect of the dynamic data stability. This method can be combined with stressed cell methods to achieve higher accuracy. Simulation results in a 130nm CMOS technology confirm the method with a good success","PeriodicalId":320365,"journal":{"name":"2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-08-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Dynamic data stability in SRAM cells and its implications on data stability tests\",\"authors\":\"M. Sharifkhani, S. Jahinuzzaman, M. Sachdev\",\"doi\":\"10.1109/MTDT.2006.12\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper discusses the concept of dynamic data stability in the SRAM cells. It is shown that the criteria for the absolute static data stability in an SRAM cell is a sub-set of its dynamic data stability. Hence, test methods that are based on dynamic stress of the cell have limited success in discovering the defective cells. Hammer test, for example, fails to discover the faults in an SRAM cell when it is data stable in the dynamic sense but not statically data stable. It will be shown that a long cell access time can detect such faults as it reduces the effect of the dynamic data stability. This method can be combined with stressed cell methods to achieve higher accuracy. Simulation results in a 130nm CMOS technology confirm the method with a good success\",\"PeriodicalId\":320365,\"journal\":{\"name\":\"2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06)\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-08-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MTDT.2006.12\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MTDT.2006.12","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Dynamic data stability in SRAM cells and its implications on data stability tests
The paper discusses the concept of dynamic data stability in the SRAM cells. It is shown that the criteria for the absolute static data stability in an SRAM cell is a sub-set of its dynamic data stability. Hence, test methods that are based on dynamic stress of the cell have limited success in discovering the defective cells. Hammer test, for example, fails to discover the faults in an SRAM cell when it is data stable in the dynamic sense but not statically data stable. It will be shown that a long cell access time can detect such faults as it reduces the effect of the dynamic data stability. This method can be combined with stressed cell methods to achieve higher accuracy. Simulation results in a 130nm CMOS technology confirm the method with a good success