{"title":"中间总线体系结构:实用回顾","authors":"Don Tan","doi":"10.1109/ISPSD.2013.6694471","DOIUrl":null,"url":null,"abstract":"Three basic intermediate bus architectures are reviewed for electronic power system developers. Salient features for practical system development are then discussed in detail, including power efficiency, regulation, component selection, load cross regulation, and board thermal flux density. The double regulated intermediate bus architecture has the best overall efficiency, regulation, size, and thermal performance.","PeriodicalId":175520,"journal":{"name":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Intermediate bus architectures: A practical review\",\"authors\":\"Don Tan\",\"doi\":\"10.1109/ISPSD.2013.6694471\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Three basic intermediate bus architectures are reviewed for electronic power system developers. Salient features for practical system development are then discussed in detail, including power efficiency, regulation, component selection, load cross regulation, and board thermal flux density. The double regulated intermediate bus architecture has the best overall efficiency, regulation, size, and thermal performance.\",\"PeriodicalId\":175520,\"journal\":{\"name\":\"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-05-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD.2013.6694471\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2013.6694471","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Intermediate bus architectures: A practical review
Three basic intermediate bus architectures are reviewed for electronic power system developers. Salient features for practical system development are then discussed in detail, including power efficiency, regulation, component selection, load cross regulation, and board thermal flux density. The double regulated intermediate bus architecture has the best overall efficiency, regulation, size, and thermal performance.