具有成本竞争力的射频晶圆测试方法,用于复杂射频集成电路的大批量生产

A. Paganini, M. Slamani, H. Ding, J. Ferrario, N. Na
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引用次数: 5

摘要

在大批量生产中,对晶圆级射频(RF)测试的需求已经增加,以响应对交付复杂“知名模具”(KGD)的不断增长的需求。为了跟上市场的步伐,需要开发创新的测试解决方案,以满足更严格的电气规范,同时最大限度地提高产量和利润率。本文介绍了一种多功能测试平台,该平台建立在低成本,定制电路与高性能薄膜探针相结合的基础上,以实现每个芯片的最低测试成本。在测试全球定位系统(GPS)射频集成电路(IC)的案例研究中,所提出的方法实现了一个四站点解决方案,与传统方法相比,证明了更好的测试时间和准确性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Cost-competitive RF wafer test methodology for high volume production of complex RF ICs
The need for radio frequency (RF) test at the wafer level in high-volume production has increased in response to the growing demand for delivering complex "good known dies" (KGD). To keep pace with the market, innovative test solutions need to be developed to meet tighter electrical specifications while maximizing yields and profit margins. This paper presents a versatile test platform built upon low- cost, custom circuitry combined with high performance membrane probes to achieve the lowest test cost per die. In a case study for testing global positioning system (GPS) RF integrated circuit (IC) the proposed methodology implements a quad-site solution to demonstrate superior test time and accuracy compared to traditional approaches.
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