用于256mb dram的分级对角位线(SLDB)堆叠电容单元

1992 International Technical Digest on Electron Devices Meeting Pub Date : 1900-01-01 DOI:10.1109/IEDM.1992.307478

T. Hamada, N. Tanabe, H. Watanabe, K. Takeuchi, N. Kasai, H. Hada, K. Shibahara, K. Tokashiki, K. Nakajima, S. Hirasawa, E. Ikawa, T. Saeki, E. Kakehashi, S. Ohya, T. Kunio

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引用次数: 7

摘要

提出了一种用于256mbdram的分级对角位线(SLDB)堆叠电容电池，该电池具有一个半球形晶粒(HSG)硅的圆柱形存储节点。该存储单元在0.54 μ m/sup 2/ 0.25 μ m设计规则的小单元面积下提供了接触孔和布线之间的大对齐公差，大字线抗扰性和大存储电容。

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A Split-Level Diagonal Bit-line (SLDB) stacked capacitor cell for 256 Mb DRAMs

A Split-Level Diagonal Bit-line (SLDB) stacked capacitor cell having a cylindrical storage node with hemispherical grained (HSG) silicon is proposed for 256 MbDRAMs. This memory cell provides large alignment tolerance between contact hole and wiring, large word-line noise immunity and large storage capacitance in a small cell area of 0.54 mu m/sup 2/ with 0.25 mu m design rule.<>

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来源期刊

1992 International Technical Digest on Electron Devices Meeting

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