M. Natarajan, S. Thijs, D. Trémouilles, D. Linten, N. Collaert, M. Jurczak, G. Groeseneken
{"title":"45纳米以下MugFET技术的ESD保护","authors":"M. Natarajan, S. Thijs, D. Trémouilles, D. Linten, N. Collaert, M. Jurczak, G. Groeseneken","doi":"10.1109/IPFA.2007.4378077","DOIUrl":null,"url":null,"abstract":"From the design point of view, while such technology options may result in increased transistor performance, the ability to achieve sufficient product reliability is to be addressed. Among the industry accepted reliability requirements, electrostatic discharge (ESD) reliability assessment is the focus of this work.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"ESD protection for sub-45 nm MugFET technology\",\"authors\":\"M. Natarajan, S. Thijs, D. Trémouilles, D. Linten, N. Collaert, M. Jurczak, G. Groeseneken\",\"doi\":\"10.1109/IPFA.2007.4378077\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"From the design point of view, while such technology options may result in increased transistor performance, the ability to achieve sufficient product reliability is to be addressed. Among the industry accepted reliability requirements, electrostatic discharge (ESD) reliability assessment is the focus of this work.\",\"PeriodicalId\":334987,\"journal\":{\"name\":\"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-07-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA.2007.4378077\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2007.4378077","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
From the design point of view, while such technology options may result in increased transistor performance, the ability to achieve sufficient product reliability is to be addressed. Among the industry accepted reliability requirements, electrostatic discharge (ESD) reliability assessment is the focus of this work.