{"title":"基于仿真的MCMS优化JTAG ATPG","authors":"A. Flint","doi":"10.1109/TEST.1997.639600","DOIUrl":null,"url":null,"abstract":"Boundary scan test generation tools generate tests based on the netlist of the design. Netlist-based tools are very efficient in designs with a high percentage of boundary scan devices, but can be inefficient in designs containing a significant percentage of non-compatible ICs. An alternative method, in which the user defines the nets to test, is explored.","PeriodicalId":186340,"journal":{"name":"Proceedings International Test Conference 1997","volume":"110 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A simulation-based JTAG ATPG optimized for MCMS\",\"authors\":\"A. Flint\",\"doi\":\"10.1109/TEST.1997.639600\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Boundary scan test generation tools generate tests based on the netlist of the design. Netlist-based tools are very efficient in designs with a high percentage of boundary scan devices, but can be inefficient in designs containing a significant percentage of non-compatible ICs. An alternative method, in which the user defines the nets to test, is explored.\",\"PeriodicalId\":186340,\"journal\":{\"name\":\"Proceedings International Test Conference 1997\",\"volume\":\"110 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings International Test Conference 1997\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TEST.1997.639600\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Test Conference 1997","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TEST.1997.639600","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Boundary scan test generation tools generate tests based on the netlist of the design. Netlist-based tools are very efficient in designs with a high percentage of boundary scan devices, but can be inefficient in designs containing a significant percentage of non-compatible ICs. An alternative method, in which the user defines the nets to test, is explored.
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