利用I/sub DDQ/对制造过程中的视觉异常进行缺陷检测

M. Sanada
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引用次数: 1

摘要

异常的I/sub DDQ/(静态V/sub DD/电源电流)表明电路存在物理损坏。利用这一现象,开发了一种基于cad的故障诊断技术,以提高逻辑大规模集成电路的成品率。该方法用于在晶圆检测设备识别的几种异常中检测致命缺陷碎片,包括分离各种泄漏故障的方法,以及确定异常部分周围的诊断区域。该技术通过逻辑仿真提取诊断区域的逻辑状态,定位与异常I/sub DDQ/相关的测试向量,逐步缩小故障区域。基本的诊断方法是通过各电路元件的比较运算来判断与异常I/sub DDQ/相同的逻辑状态是否存在正常的逻辑状态。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Defect detection from visual abnormalities in manufacturing process using I/sub DDQ/
Abnormal I/sub DDQ/ (quiescent V/sub DD/ supply current) indicates the existence of physical damage in a circuit. Using this phenomenon, a CAD-based fault diagnosis technology has been developed to enhance the manufacturing yield of logic LSI. This method to detect the fatal defect fragments in several abnormalities identified with wafer inspection apparatus includes a way to separate various leakage faults, and to define the diagnosis area encircling the abnormal portions. The proposed technique progressively narrows the faulty area by using logic simulation to extract the logic states of the diagnosis area, and by locating test vectors related to abnormal I/sub DDQ/. The fundamental diagnosis way employs the comparative operation of each circuit element to determine whether the same logic state with abnormal I/sub DDQ/ exists in normal logic state or not.
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