用于TTL组合电路供电电流测试的随机测试输入生成

Proceedings of IEEE 3rd Asian Test Symposium (ATS) Pub Date : 1994-11-15 DOI:10.1109/ATS.1994.367241

M. Hashizume, I. Tsukimoto, T. Tamesada

{"title":"用于TTL组合电路供电电流测试的随机测试输入生成","authors":"M. Hashizume, I. Tsukimoto, T. Tamesada","doi":"10.1109/ATS.1994.367241","DOIUrl":null,"url":null,"abstract":"In this paper, a random test generation algorithm for supply current testing of TTL combinational circuits is proposed. In this method, by inserting equivalent faults first in the direction from the primary output ports to the primary input ports, the total number of fault simulations can be decreased. In this paper it is shown that test input vector can be derived more quickly by means of the algorithm.<<ETX>>","PeriodicalId":182440,"journal":{"name":"Proceedings of IEEE 3rd Asian Test Symposium (ATS)","volume":"101 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Random test input generation for supply current testing of TTL combinational circuits\",\"authors\":\"M. Hashizume, I. Tsukimoto, T. Tamesada\",\"doi\":\"10.1109/ATS.1994.367241\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a random test generation algorithm for supply current testing of TTL combinational circuits is proposed. In this method, by inserting equivalent faults first in the direction from the primary output ports to the primary input ports, the total number of fault simulations can be decreased. In this paper it is shown that test input vector can be derived more quickly by means of the algorithm.<<ETX>>\",\"PeriodicalId\":182440,\"journal\":{\"name\":\"Proceedings of IEEE 3rd Asian Test Symposium (ATS)\",\"volume\":\"101 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-11-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of IEEE 3rd Asian Test Symposium (ATS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.1994.367241\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE 3rd Asian Test Symposium (ATS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.1994.367241","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 2

摘要

本文提出了一种用于TTL组合电路供电电流测试的随机测试生成算法。该方法首先在主输出端口到主输入端口的方向上插入等效故障，可以减少故障模拟的总数。本文的研究表明，利用该算法可以更快地得到测试输入向量。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Random test input generation for supply current testing of TTL combinational circuits

In this paper, a random test generation algorithm for supply current testing of TTL combinational circuits is proposed. In this method, by inserting equivalent faults first in the direction from the primary output ports to the primary input ports, the total number of fault simulations can be decreased. In this paper it is shown that test input vector can be derived more quickly by means of the algorithm.<>

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings of IEEE 3rd Asian Test Symposium (ATS)

自引率

0.00%

发文量