二维和三维集成电路中关键性能指标的比较

Proceedings of the IEEE 2000 International Interconnect Technology Conference (Cat. No.00EX407) Pub Date : 2000-06-05 DOI:10.1109/IITC.2000.854268

A. Rahman, A. Fan, R. Reif

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引用次数: 39

摘要

本文使用系统级建模方法估计了二维(2-D)和三维(3-D)集成电路(IC)中从250纳米到50纳米技术节点的缩放技术的一些关键性能指标。以微处理器为例，对二维和三维实现的时钟频率、芯片面积、互连延迟和中继器数量等性能指标进行了预测。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Comparison of key performance metrics in two- and three-dimensional integrated circuits

In this paper some key performance metrics in two-dimensional (2-D) and three-dimensional (3-D) integrated circuits (IC) are estimated for scaled technologies from 250-nm to 50-nm technology nodes using a system-level modeling approach. Considering a microprocessor as an example, projections are made for performance metrics such as clock frequency, chip area, interconnect delay and repeater's number for 2-D and 3-D implementation.

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Proceedings of the IEEE 2000 International Interconnect Technology Conference (Cat. No.00EX407)

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