{"title":"减少STT-MRAM读失败","authors":"S. Nair, R. Bishnoi, M. Tahoori","doi":"10.1109/VTS48691.2020.9107605","DOIUrl":null,"url":null,"abstract":"Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) is an emerging non-volatile memory technology, as a leading candidate to replace conventional on-chip memories due to its various advantages such as high density, non-volatility, scalability, high endurance and CMOS compatibility. However, read and write operations in STT-MRAM are extremely vulnerable to manufacturing variations. In particular, the read operation is becoming more susceptible to failures since the read timing and read-disturb failures have conflicting requirements of read period. To overcome this issue, we propose a technique to reduce the read period without sacrificing the target reliability requirements. The reduced read period, in turn, results in improved read performance and reduced read-disturb rates. The results show that using this technique, the read period can be reduced by 50%, and the read-disturb probability by 51%.","PeriodicalId":326132,"journal":{"name":"2020 IEEE 38th VLSI Test Symposium (VTS)","volume":"167 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Mitigating Read Failures in STT-MRAM\",\"authors\":\"S. Nair, R. Bishnoi, M. Tahoori\",\"doi\":\"10.1109/VTS48691.2020.9107605\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) is an emerging non-volatile memory technology, as a leading candidate to replace conventional on-chip memories due to its various advantages such as high density, non-volatility, scalability, high endurance and CMOS compatibility. However, read and write operations in STT-MRAM are extremely vulnerable to manufacturing variations. In particular, the read operation is becoming more susceptible to failures since the read timing and read-disturb failures have conflicting requirements of read period. To overcome this issue, we propose a technique to reduce the read period without sacrificing the target reliability requirements. The reduced read period, in turn, results in improved read performance and reduced read-disturb rates. The results show that using this technique, the read period can be reduced by 50%, and the read-disturb probability by 51%.\",\"PeriodicalId\":326132,\"journal\":{\"name\":\"2020 IEEE 38th VLSI Test Symposium (VTS)\",\"volume\":\"167 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 38th VLSI Test Symposium (VTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTS48691.2020.9107605\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 38th VLSI Test Symposium (VTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTS48691.2020.9107605","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) is an emerging non-volatile memory technology, as a leading candidate to replace conventional on-chip memories due to its various advantages such as high density, non-volatility, scalability, high endurance and CMOS compatibility. However, read and write operations in STT-MRAM are extremely vulnerable to manufacturing variations. In particular, the read operation is becoming more susceptible to failures since the read timing and read-disturb failures have conflicting requirements of read period. To overcome this issue, we propose a technique to reduce the read period without sacrificing the target reliability requirements. The reduced read period, in turn, results in improved read performance and reduced read-disturb rates. The results show that using this technique, the read period can be reduced by 50%, and the read-disturb probability by 51%.