Shien-Yang Wu, C. Y. Lin, M. Chiang, J. Liaw, J. Cheng, C. H. Chang, V. Chang, K. Pan, C. Tsai, C. Yao, T. Miyashita, Y. Wu, K. Ting, C. Hsieh, R. F. Tsui, R. Chen, C. Yang, H. Chang, C. Lee, K. Chen, Y. Ku, S. Jang
{"title":"演示了一种低于0.03 um2的高密度6-T SRAM，该SRAM具有用于超过10nm节点的移动SOC应用的缩放体finfet","authors":"Shien-Yang Wu, C. Y. Lin, M. Chiang, J. Liaw, J. Cheng, C. H. Chang, V. Chang, K. Pan, C. Tsai, C. Yao, T. Miyashita, Y. Wu, K. Ting, C. Hsieh, R. F. Tsui, R. Chen, C. Yang, H. Chang, C. Lee, K. Chen, Y. Ku, S. Jang","doi":"10.1109/VLSIT.2016.7573390","DOIUrl":null,"url":null,"abstract":"For the first time, we demonstrate the smallest, fully functional 32Mb 6-T high density SRAM reported in literature with scaled bulk FinFETs for CMOS technology beyond 10nm node. Scaled FinFET devices exhibit excellent electrostatic with DIBL of <;45mV/V and sub-threshold swing of <;65mV/decade and competitive drive current. Static noise margin of ~90mV for the high density SRAM operated down to 0.45V is achieved.","PeriodicalId":129300,"journal":{"name":"2016 IEEE Symposium on VLSI Technology","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"21","resultStr":"{\"title\":\"Demonstration of a sub-0.03 um2 high density 6-T SRAM with scaled bulk FinFETs for mobile SOC applications beyond 10nm node\",\"authors\":\"Shien-Yang Wu, C. Y. Lin, M. Chiang, J. Liaw, J. Cheng, C. H. Chang, V. Chang, K. Pan, C. Tsai, C. Yao, T. Miyashita, Y. Wu, K. Ting, C. Hsieh, R. F. Tsui, R. Chen, C. Yang, H. Chang, C. Lee, K. Chen, Y. Ku, S. Jang\",\"doi\":\"10.1109/VLSIT.2016.7573390\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For the first time, we demonstrate the smallest, fully functional 32Mb 6-T high density SRAM reported in literature with scaled bulk FinFETs for CMOS technology beyond 10nm node. Scaled FinFET devices exhibit excellent electrostatic with DIBL of <;45mV/V and sub-threshold swing of <;65mV/decade and competitive drive current. Static noise margin of ~90mV for the high density SRAM operated down to 0.45V is achieved.\",\"PeriodicalId\":129300,\"journal\":{\"name\":\"2016 IEEE Symposium on VLSI Technology\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"21\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Symposium on VLSI Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2016.7573390\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2016.7573390","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Demonstration of a sub-0.03 um2 high density 6-T SRAM with scaled bulk FinFETs for mobile SOC applications beyond 10nm node
For the first time, we demonstrate the smallest, fully functional 32Mb 6-T high density SRAM reported in literature with scaled bulk FinFETs for CMOS technology beyond 10nm node. Scaled FinFET devices exhibit excellent electrostatic with DIBL of <;45mV/V and sub-threshold swing of <;65mV/decade and competitive drive current. Static noise margin of ~90mV for the high density SRAM operated down to 0.45V is achieved.
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