Simulation- measurement correlation study of single ended interfaces by using Signal Integrity and Power Integrity co-simulation

Signal Integrity (SI) and Power Integrity (PI) issues are the major concern for high speed design in Electronics Industries these days. Currently, SI and PI analysis is done mostly independently and even though some indirect considerations of each other might be taken during analysis, these SI and PI behaviors doesn't always sum up linearly. This results in very pessimistic designs which does not longer applicable in today's challenging and cost efficient world. Therefore it is crucial to do SI and PI co-simulation in order to achieve lower voltage, higher current and yet cheaper design. In this paper, SI-PI co-simulation has been performed on General Purpose Input Output (GPIO) of interfaces of Intel's latest flip chip chipset. This project's scope also includes lab activities to correlate and validate our simulations results. The most important of all, the findings and lessons learned from this project will also be shared. This information contains valuable and essential data that can be proliferated into future designs to make more robust, competitive and cost effective product.