{"title":"CADDY合成系统中基本模块之间的调度","authors":"P. Gutberlet, W. Rosenstiel","doi":"10.1109/EDAC.1992.205985","DOIUrl":null,"url":null,"abstract":"In 'high level' IC synthesis, basic blocks are caused by the control schemes and the block structure of the specification language (branches, loops). These schemes must be considered by the construction of the controller. A method is presented to handle the basic blocks in a more flexible way which allows one to move operations between basic block boundaries. The goal is to improve the number of control steps of the circuit under fixed hardware resources.<<ETX>>","PeriodicalId":285019,"journal":{"name":"[1992] Proceedings The European Conference on Design Automation","volume":"54 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"Scheduling between basic blocks in the CADDY synthesis system\",\"authors\":\"P. Gutberlet, W. Rosenstiel\",\"doi\":\"10.1109/EDAC.1992.205985\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In 'high level' IC synthesis, basic blocks are caused by the control schemes and the block structure of the specification language (branches, loops). These schemes must be considered by the construction of the controller. A method is presented to handle the basic blocks in a more flexible way which allows one to move operations between basic block boundaries. The goal is to improve the number of control steps of the circuit under fixed hardware resources.<<ETX>>\",\"PeriodicalId\":285019,\"journal\":{\"name\":\"[1992] Proceedings The European Conference on Design Automation\",\"volume\":\"54 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-03-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1992] Proceedings The European Conference on Design Automation\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDAC.1992.205985\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1992] Proceedings The European Conference on Design Automation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDAC.1992.205985","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Scheduling between basic blocks in the CADDY synthesis system
In 'high level' IC synthesis, basic blocks are caused by the control schemes and the block structure of the specification language (branches, loops). These schemes must be considered by the construction of the controller. A method is presented to handle the basic blocks in a more flexible way which allows one to move operations between basic block boundaries. The goal is to improve the number of control steps of the circuit under fixed hardware resources.<>