{"title":"高速测试仪时钟信号分配网络","authors":"C. Hsue","doi":"10.1109/TEST.1989.82295","DOIUrl":null,"url":null,"abstract":"A high-speed clock distribution network is described. By analyzing the transient behavior of the pulse signal along a multisection transmission line, the author develops a new impedance-matching methodology to reduce the internal multireflection processes due to the impedance discontinuities in the signal line. By means of the bisection method, the matched transmission line is converted into a single-input, 2/sup n/-output, binary-tree distribution circuit. The circuit is realized on a planar printed-circuit board. Experimental results show that this distribution system can provide equiamplitude, high-fidelity, nonskewed signals to all the output terminals for pulse signal frequency in excess of 800 MHz.<<ETX>>","PeriodicalId":264111,"journal":{"name":"Proceedings. 'Meeting the Tests of Time'., International Test Conference","volume":"71 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Clock signal distribution network for high speed testers\",\"authors\":\"C. Hsue\",\"doi\":\"10.1109/TEST.1989.82295\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A high-speed clock distribution network is described. By analyzing the transient behavior of the pulse signal along a multisection transmission line, the author develops a new impedance-matching methodology to reduce the internal multireflection processes due to the impedance discontinuities in the signal line. By means of the bisection method, the matched transmission line is converted into a single-input, 2/sup n/-output, binary-tree distribution circuit. The circuit is realized on a planar printed-circuit board. Experimental results show that this distribution system can provide equiamplitude, high-fidelity, nonskewed signals to all the output terminals for pulse signal frequency in excess of 800 MHz.<<ETX>>\",\"PeriodicalId\":264111,\"journal\":{\"name\":\"Proceedings. 'Meeting the Tests of Time'., International Test Conference\",\"volume\":\"71 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-08-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. 'Meeting the Tests of Time'., International Test Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TEST.1989.82295\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 'Meeting the Tests of Time'., International Test Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TEST.1989.82295","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Clock signal distribution network for high speed testers
A high-speed clock distribution network is described. By analyzing the transient behavior of the pulse signal along a multisection transmission line, the author develops a new impedance-matching methodology to reduce the internal multireflection processes due to the impedance discontinuities in the signal line. By means of the bisection method, the matched transmission line is converted into a single-input, 2/sup n/-output, binary-tree distribution circuit. The circuit is realized on a planar printed-circuit board. Experimental results show that this distribution system can provide equiamplitude, high-fidelity, nonskewed signals to all the output terminals for pulse signal frequency in excess of 800 MHz.<>
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