测试电路，用于精确测量存储器的设置/保持和访问时间

Proceedings of the 2015 International Conference on Microelectronic Test Structures Pub Date : 2015-03-23 DOI:10.1109/ICMTS.2015.7106153

Neha Agarwal

{"title":"测试电路，用于精确测量存储器的设置/保持和访问时间","authors":"Neha Agarwal","doi":"10.1109/ICMTS.2015.7106153","DOIUrl":null,"url":null,"abstract":"This paper will examine the latest developments in the field of designing the test circuits for accurate measurement of setup/hold and access time of memory IPs. Measurement across all voltage domain and temperature corners, by way of the architecture discussed, has a fine resolution of just two inverter delay and correlates well with silicon within permissible range.","PeriodicalId":177627,"journal":{"name":"Proceedings of the 2015 International Conference on Microelectronic Test Structures","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-03-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Test circuit for accurate measurement of setup/hold and access time of memories\",\"authors\":\"Neha Agarwal\",\"doi\":\"10.1109/ICMTS.2015.7106153\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper will examine the latest developments in the field of designing the test circuits for accurate measurement of setup/hold and access time of memory IPs. Measurement across all voltage domain and temperature corners, by way of the architecture discussed, has a fine resolution of just two inverter delay and correlates well with silicon within permissible range.\",\"PeriodicalId\":177627,\"journal\":{\"name\":\"Proceedings of the 2015 International Conference on Microelectronic Test Structures\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-03-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2015 International Conference on Microelectronic Test Structures\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMTS.2015.7106153\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2015 International Conference on Microelectronic Test Structures","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS.2015.7106153","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

本文将研究内存ip设置/保持和访问时间精确测量测试电路设计领域的最新进展。通过所讨论的架构，测量所有电压域和温度角，具有仅两个逆变器延迟的精细分辨率，并且在允许范围内与硅具有良好的相关性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Test circuit for accurate measurement of setup/hold and access time of memories

This paper will examine the latest developments in the field of designing the test circuits for accurate measurement of setup/hold and access time of memory IPs. Measurement across all voltage domain and temperature corners, by way of the architecture discussed, has a fine resolution of just two inverter delay and correlates well with silicon within permissible range.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings of the 2015 International Conference on Microelectronic Test Structures

自引率

0.00%

发文量