M. Yew, C. Yuan, C.N. Han, C.S. Huang, W. Yang, K. Chiang
{"title":"具有扇出能力的金属晶片WLCSP技术的析因分析","authors":"M. Yew, C. Yuan, C.N. Han, C.S. Huang, W. Yang, K. Chiang","doi":"10.1109/IPFA.2006.251035","DOIUrl":null,"url":null,"abstract":"In this study, a wafer level chip scaled packaging (WLCSP) having the capability of redistributing the electrical circuit is proposed to resolve the problem of assembling a fine-pitched chip to a coarse-pitched substrate. In the fan-out WLCSP, the solder bumps could be located on both the filler polymer and chip surface. The concept of the fan-out WLCSP and the processes of fabricating the novel fan-out WLCSP would be described. In addition, the reliability characteristic of the fan-out WLCSP in packaging level is described by using the two-dimensional finite element model. The 25 factorial designs with the analysis of variance (ANOVA) are conducted to obtain the sensitivity information of the packaging","PeriodicalId":283576,"journal":{"name":"2006 13th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Factorial Analysis of Chip-on-Metal WLCSP Technology with Fan-Out Capability\",\"authors\":\"M. Yew, C. Yuan, C.N. Han, C.S. Huang, W. Yang, K. Chiang\",\"doi\":\"10.1109/IPFA.2006.251035\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this study, a wafer level chip scaled packaging (WLCSP) having the capability of redistributing the electrical circuit is proposed to resolve the problem of assembling a fine-pitched chip to a coarse-pitched substrate. In the fan-out WLCSP, the solder bumps could be located on both the filler polymer and chip surface. The concept of the fan-out WLCSP and the processes of fabricating the novel fan-out WLCSP would be described. In addition, the reliability characteristic of the fan-out WLCSP in packaging level is described by using the two-dimensional finite element model. The 25 factorial designs with the analysis of variance (ANOVA) are conducted to obtain the sensitivity information of the packaging\",\"PeriodicalId\":283576,\"journal\":{\"name\":\"2006 13th International Symposium on the Physical and Failure Analysis of Integrated Circuits\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-07-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 13th International Symposium on the Physical and Failure Analysis of Integrated Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA.2006.251035\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 13th International Symposium on the Physical and Failure Analysis of Integrated Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2006.251035","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Factorial Analysis of Chip-on-Metal WLCSP Technology with Fan-Out Capability
In this study, a wafer level chip scaled packaging (WLCSP) having the capability of redistributing the electrical circuit is proposed to resolve the problem of assembling a fine-pitched chip to a coarse-pitched substrate. In the fan-out WLCSP, the solder bumps could be located on both the filler polymer and chip surface. The concept of the fan-out WLCSP and the processes of fabricating the novel fan-out WLCSP would be described. In addition, the reliability characteristic of the fan-out WLCSP in packaging level is described by using the two-dimensional finite element model. The 25 factorial designs with the analysis of variance (ANOVA) are conducted to obtain the sensitivity information of the packaging