封装系统用TSV三维硅模组的研制

N. Khan, V. S. Rao, S. Lim, H. We, V. Lee, Zhang Wu, Yang Rui, L. Ebin
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引用次数: 74

摘要

便携式电子产品需要包含数字、射频和存储功能的多功能模块。通硅通孔技术为系统级封装提供了一种实现复杂、多功能集成和更高封装密度的方法。本文开发了一种具有通硅孔的三维硅模块。进行了热力学分析,优化了硅通孔互连设计。代表不同功能电路的多个芯片使用线键和倒装芯片互连方法组装。硅载体采用先过孔法制备,铜载体采用特殊的背磨工艺暴露。本文开发了一种两层硅模块,并对其进行了表征。研究了适用于5ghz数字应用的硅载波的功率分配设计。在温度循环(- 40/125摄氏度)和跌落测试下评估了模块的可靠性。上模和下填样品通过JEDEC 1500 G和0.5 ms脉冲持续时间的跌落测试。热循环试验结果显示无焊点失效。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Development of 3D silicon module with TSV for system in packaging
Portable electronic products demand multifunctional module comprising digital, RF and memory functions. Through-silicon via technology provides a means of implementing complex, multi-functional integration with a higher packing density for a System in Package. A 3D silicon module with through silicon via has been developed in this work. Thermo-mechanical analysis has been performed and through silicon via interconnect design is optimized. Multiple chips representing different functional circuits are assembled using wirebond and flip chip interconnection methods. Silicon carrier is fabricated using via-first approach, the burrier copper via is exposed by special backgrinding process. A two-stack silicon module is developed and characterized in this work. Power distribution design for the silicon carrier suitable for 5 GHz digital application is studied and characterized. The module reliability has been evaluated under temperature cycling (- 40/125degC) and drop test. Samples with over-mold and underfill passed the JEDEC drop test of 1500 G & 0.5 ms pulse duration. Thermal cycle test results showed no solder joint failure.
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