S. Voinigescu, S. W. Tarasewicz, T. MacElwee, J. Ilowski
{"title":"对射频应用中最先进的0.5 /spl mu/m批量CMOS技术的评估","authors":"S. Voinigescu, S. W. Tarasewicz, T. MacElwee, J. Ilowski","doi":"10.1109/IEDM.1995.499320","DOIUrl":null,"url":null,"abstract":"We demonstrate that, given the appropriate layout geometry, state-of-the-art, salicided n-MOSFETs with 0.5 /spl mu/M drawn gates exhibit similar g/sub m/ (160 mS/mm), f/sub T/ (20 GHz), f/sub MAX/ (37 GHz), and F/sub MIN/ (1.9 dB @ 3.4 GHz) as the more costly, metal-reinforced SOI or SOS devices of identical gate length. The record f/sub MAX/ value for 0.5 /spl mu/m bulk CMOS is comparable to that of self-aligned, double-polysilicon BJTs.","PeriodicalId":137564,"journal":{"name":"Proceedings of International Electron Devices Meeting","volume":"67 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"76","resultStr":"{\"title\":\"An assessment of the state-of-the-art 0.5 /spl mu/m bulk CMOS technology for RF applications\",\"authors\":\"S. Voinigescu, S. W. Tarasewicz, T. MacElwee, J. Ilowski\",\"doi\":\"10.1109/IEDM.1995.499320\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We demonstrate that, given the appropriate layout geometry, state-of-the-art, salicided n-MOSFETs with 0.5 /spl mu/M drawn gates exhibit similar g/sub m/ (160 mS/mm), f/sub T/ (20 GHz), f/sub MAX/ (37 GHz), and F/sub MIN/ (1.9 dB @ 3.4 GHz) as the more costly, metal-reinforced SOI or SOS devices of identical gate length. The record f/sub MAX/ value for 0.5 /spl mu/m bulk CMOS is comparable to that of self-aligned, double-polysilicon BJTs.\",\"PeriodicalId\":137564,\"journal\":{\"name\":\"Proceedings of International Electron Devices Meeting\",\"volume\":\"67 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-12-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"76\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.1995.499320\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1995.499320","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 76
摘要
我们证明,给定适当的布局几何形状,具有0.5 /spl μ M /M栅极的最先进的盐化n- mosfet具有与相同栅极长度的更昂贵的金属增强SOI或SOS器件相似的g/sub M / (160 mS/mm), f/sub T/ (20 GHz), f/sub MAX/ (37 GHz)和f/sub MIN/ (1.9 dB @ 3.4 GHz)。0.5 /spl mu/m块体CMOS的记录f/sub MAX/值与自对准双多晶硅bjt相当。
An assessment of the state-of-the-art 0.5 /spl mu/m bulk CMOS technology for RF applications
We demonstrate that, given the appropriate layout geometry, state-of-the-art, salicided n-MOSFETs with 0.5 /spl mu/M drawn gates exhibit similar g/sub m/ (160 mS/mm), f/sub T/ (20 GHz), f/sub MAX/ (37 GHz), and F/sub MIN/ (1.9 dB @ 3.4 GHz) as the more costly, metal-reinforced SOI or SOS devices of identical gate length. The record f/sub MAX/ value for 0.5 /spl mu/m bulk CMOS is comparable to that of self-aligned, double-polysilicon BJTs.