{"title":"替代金属栅极(RMG) p- finet中漏极偏置和自热效应下NBTI影响的TCAD评估框架","authors":"Uma Sharma, S. Mahapatra","doi":"10.23919/SISPAD49475.2020.9241639","DOIUrl":null,"url":null,"abstract":"Sentaurus TCAD is enabled to calculate interface trap generation ($\\Delta N_{IT}$) during Negative Bias Temperature Instability (NBTI) under drain bias (VD) and self-heating (SH) effects. The setup is calibrated with pure NBTI (VD=0V) experimental data, and is further used to determine the NBTI component during Hot Carrier Degradation (HCD) stress. Such decomposition of NBTI and HCD is demonstrated for multiple fin length (FL) p-FinFETs to model HCD experimental data at different $VG/VD$ stress.","PeriodicalId":206964,"journal":{"name":"2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A TCAD Framework for Assessing NBTI Impact Under Drain Bias and Self-Heating Effects in Replacement Metal Gate (RMG) p-FinFETs\",\"authors\":\"Uma Sharma, S. Mahapatra\",\"doi\":\"10.23919/SISPAD49475.2020.9241639\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Sentaurus TCAD is enabled to calculate interface trap generation ($\\\\Delta N_{IT}$) during Negative Bias Temperature Instability (NBTI) under drain bias (VD) and self-heating (SH) effects. The setup is calibrated with pure NBTI (VD=0V) experimental data, and is further used to determine the NBTI component during Hot Carrier Degradation (HCD) stress. Such decomposition of NBTI and HCD is demonstrated for multiple fin length (FL) p-FinFETs to model HCD experimental data at different $VG/VD$ stress.\",\"PeriodicalId\":206964,\"journal\":{\"name\":\"2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-09-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/SISPAD49475.2020.9241639\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/SISPAD49475.2020.9241639","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A TCAD Framework for Assessing NBTI Impact Under Drain Bias and Self-Heating Effects in Replacement Metal Gate (RMG) p-FinFETs
Sentaurus TCAD is enabled to calculate interface trap generation ($\Delta N_{IT}$) during Negative Bias Temperature Instability (NBTI) under drain bias (VD) and self-heating (SH) effects. The setup is calibrated with pure NBTI (VD=0V) experimental data, and is further used to determine the NBTI component during Hot Carrier Degradation (HCD) stress. Such decomposition of NBTI and HCD is demonstrated for multiple fin length (FL) p-FinFETs to model HCD experimental data at different $VG/VD$ stress.