利用“累积键合集成电路”(CUBIC)技术制造三维集成电路

Y. Hayashi, S. Wada, K. Kajiyana, K. Oyama, R. Koh, S. Takahashi, T. Kunio
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引用次数: 22

摘要

提出了一种用于制造具有大量器件层的三维集成电路(3d -IC)的技术,称为“累积键合IC”(CUBIC)技术,其中多个薄膜器件被累积键合。该技术被用于制造一个双有源层器件,该器件具有块硅NMOSFET下层和薄化NMOSFET上层。CUBIC技术本质上是一种设备对背键合技术,适用于制造具有三层以上有源设备层的3d - ic。该工艺包括两个子工艺-晶圆减薄和薄膜层压。优先抛光用于晶圆稀释,碰撞/工具接触用于设备到设备的垂直互连
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Fabrication of three-dimensional IC using `cumulatively bonded IC' (CUBIC) technology
A technology is proposed for the fabrication of three-dimensional integrated circuits (3D-ICs) having a large number of device layers, referred to as `cumulatively bonded IC' (CUBIC) technology wherein several thin-film devices are bonded cumulatively. The technology was used to fabricate a two-active-layer device having a bulk-Si NMOSFET lower layer and a thinned NMOSFET upper layer. The CUBIC technology, essentially a face-to-back device bonding technology, is applicable to fabricating 3D-ICs having more than three active-device layers. The process consists of two subprocesses-wafer thinning and thin-film lamination. Preferential polishing was used for wafer thinning and bump/tool contacts were used for device-to-device vertical interconnections
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