三维集成技术与三维互联进展

2007 IEEE International Interconnect Technology Conferencee Pub Date : 2007-06-04 DOI:10.1109/IITC.2007.382393

S. Pozder, R. Chatterjee, A. Jain, Zhihong Huang, R.E. Jones, E. Acosta

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引用次数: 55

摘要

具有多个有源半导体能级的三维堆叠电路依赖于层键合、层间微连接、层通孔(TSV)和晶圆减薄工艺的发展。这些3D地层叠加工艺技术的进步为更强大、更强大的3D工艺集成开辟了道路。

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Progress of 3D Integration Technologies and 3D Interconnects

Three dimensional stacked circuits having multiple active semiconductor levels rely on the development of strata bonding, micro connects between strata, through strata vias (TSV) and a wafer thinning process. Progress in the each of these process technologies for 3D strata stacking is opening the path to more robust and capable 3D process integrations.

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2007 IEEE International Interconnect Technology Conferencee

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