B. Parvais, A. Mercha, N. Collaert, R. Rooyackers, I. Ferain, M. Jurczak, V. Subramanian, A. De Keersgieter, T. Chiarella, C. Kerner, L. Witters, S. Biesemans, T. Hoffman
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The device architecture dilemma for CMOS technologies: Opportunities & challenges of finFET over planar MOSFET
Despite their excellent control of short channel effects, FinFETs suffer from different trade-offs in the mixed-signal domain, with respect to planar devices. For the first time, we report a complete and comprehensive comparative analysis showing that these trade-offs can be alleviated in advanced FinFET technology. As such, higher voltage gain and transconductance than planar MOSFETs are reached at the same time. VT mismatch smaller than 3mV.µm is obtained for narrow (10nm) fins. Reduced speed sensitivity to gate pitch scaling and invertor delay reduced below 10 ps will be demonstrated.
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