{"title":"基于晶体管和基于电路的数字电路可靠性评估的关系","authors":"B. Vaidyanathan, S. Bai, A. Oates","doi":"10.1109/IRPS.2011.5784562","DOIUrl":null,"url":null,"abstract":"Logic, analog, RF, SRAM, and DRAM circuits respond differently to NBTI and HCI induced time dependent parametric shifts. We analyze digital logic susceptibility to these transistor degradation mechanisms and identify the benefits of simulation based aging-induced reliability assurance at the product level.","PeriodicalId":242672,"journal":{"name":"2011 International Reliability Physics Symposium","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"The relationship between transistor-based and circuit-based reliability assessment for digital circuits\",\"authors\":\"B. Vaidyanathan, S. Bai, A. Oates\",\"doi\":\"10.1109/IRPS.2011.5784562\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Logic, analog, RF, SRAM, and DRAM circuits respond differently to NBTI and HCI induced time dependent parametric shifts. We analyze digital logic susceptibility to these transistor degradation mechanisms and identify the benefits of simulation based aging-induced reliability assurance at the product level.\",\"PeriodicalId\":242672,\"journal\":{\"name\":\"2011 International Reliability Physics Symposium\",\"volume\":\"49 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-04-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 International Reliability Physics Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRPS.2011.5784562\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 International Reliability Physics Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRPS.2011.5784562","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The relationship between transistor-based and circuit-based reliability assessment for digital circuits
Logic, analog, RF, SRAM, and DRAM circuits respond differently to NBTI and HCI induced time dependent parametric shifts. We analyze digital logic susceptibility to these transistor degradation mechanisms and identify the benefits of simulation based aging-induced reliability assurance at the product level.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
