5 .硅衬底等离子体工艺缺陷的空间和能量分布对MOS器件性能影响的模型分析

2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2020-09-23 DOI:10.23919/SISPAD49475.2020.9241621

T. Hamano, K. Urabe, K. Eriguchi

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引用次数: 0

摘要

本文全面讨论了等离子体处理引起的硅衬底缺陷轮廓对MOS器件性能的影响。考虑实际等离子体参数，将缺陷的空间和能量分布实现到常规器件模拟中。根据能量分布得到了MOS电容器独特的电容电压特性，与实验结果吻合较好。阐明了n沟道和p沟道mosfet缺陷分布与器件参数变化的关系。预测结果表明，精确控制缺陷的空间和能量分布对未来MOS器件的设计和制造具有重要意义。

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5 Model analysis for effects of spatial and energy profiles of plasma process-induced defects in Si substrate on MOS device performance

This paper comprehensively discusses impacts of defect profiles in a Si substrate induced by plasma processing on MOS device performance. Both spatial and energy profiles of the defects considering practical plasma parameters were implemented into a conventional device simulation. Unique capacitance-voltage characteristics of MOS capacitors were obtained depending on the energy profiles, which shows good agreement with experimental results. The relationship between the defect profile and device parameter variation was clarified for n- and p-channel MOSFETs. The prediction results suggest the significance of precise control of spatial and energy profiles of defects for future MOS device design and fabrication.

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2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)

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