Extraction of Si-SiO2 Interface Trap Densities in MOSFET's with Oxides Down to 1.3 nm Thick

It is shown that reliable interface trap density values can be extracted from MOS devices with ultrathin oxides by using charge pumping and small gate voltage swings. This presents three advantages with respect to the conventional large gate voltage swing approach: the extraction is simple as carrier emission do not contribute to the CP signal so that the CP current magnitude directly reflects the interface trap density; the tunneling current is strongly reduced allowing a more easy extraction of the CP signal; this prevents the insulator and the insulator-silicon interface from any degradation. By doing so, interface trap densities from MOS devices with oxides down to 1.3 nm thick are reported for the first time.