Jungwoo Oh, P. Majhi, R. Jammy, R. Joe, A. Dip, T. Sugawara, Y. Akasaka, T. Kaitsuka, T. Arikado, M. Tomoyasu
{"title":"利用优化的Si Cap和高k金属栅极堆叠,增强SiGe沟道pmosfet的可加性迁移率和降低失态电流","authors":"Jungwoo Oh, P. Majhi, R. Jammy, R. Joe, A. Dip, T. Sugawara, Y. Akasaka, T. Kaitsuka, T. Arikado, M. Tomoyasu","doi":"10.1109/VTSA.2009.5159274","DOIUrl":null,"url":null,"abstract":"We have demonstrated high mobility pMOSFETs on high quality epitaxial SiGe films selectively grown on Si (100) substrates. With a Si cap processed on SiGe channels, HfSiO2 high-k gate dielectrics exhibited low C-V hysteresis (≪10 mV), interface trap density (7.5×1010), and gate leakage current (∼10−2A/cm2 at an EOT of 13.4Å), which are comparable to gate stack on Si channels. The mobility enhancement afforded intrinsically by the SiGe channel (60%) is further increased by a Si cap (40%) process, resulting in a combined ∼100% enhancement over Si channels. The Si cap process also mitigates the low potential barrier issues of SiGe channels, which are major causes of the high off-state current of small bandgap energy SiGe pMOSFETs, by improving gate control over the channel.","PeriodicalId":309622,"journal":{"name":"2009 International Symposium on VLSI Technology, Systems, and Applications","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2009-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Additive mobility enhancement and off-state current reduction in SiGe channel pMOSFETs with optimized Si Cap and high-k metal gate stacks\",\"authors\":\"Jungwoo Oh, P. Majhi, R. Jammy, R. Joe, A. Dip, T. Sugawara, Y. Akasaka, T. Kaitsuka, T. Arikado, M. Tomoyasu\",\"doi\":\"10.1109/VTSA.2009.5159274\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We have demonstrated high mobility pMOSFETs on high quality epitaxial SiGe films selectively grown on Si (100) substrates. With a Si cap processed on SiGe channels, HfSiO2 high-k gate dielectrics exhibited low C-V hysteresis (≪10 mV), interface trap density (7.5×1010), and gate leakage current (∼10−2A/cm2 at an EOT of 13.4Å), which are comparable to gate stack on Si channels. The mobility enhancement afforded intrinsically by the SiGe channel (60%) is further increased by a Si cap (40%) process, resulting in a combined ∼100% enhancement over Si channels. The Si cap process also mitigates the low potential barrier issues of SiGe channels, which are major causes of the high off-state current of small bandgap energy SiGe pMOSFETs, by improving gate control over the channel.\",\"PeriodicalId\":309622,\"journal\":{\"name\":\"2009 International Symposium on VLSI Technology, Systems, and Applications\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-04-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Symposium on VLSI Technology, Systems, and Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTSA.2009.5159274\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Symposium on VLSI Technology, Systems, and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTSA.2009.5159274","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Additive mobility enhancement and off-state current reduction in SiGe channel pMOSFETs with optimized Si Cap and high-k metal gate stacks
We have demonstrated high mobility pMOSFETs on high quality epitaxial SiGe films selectively grown on Si (100) substrates. With a Si cap processed on SiGe channels, HfSiO2 high-k gate dielectrics exhibited low C-V hysteresis (≪10 mV), interface trap density (7.5×1010), and gate leakage current (∼10−2A/cm2 at an EOT of 13.4Å), which are comparable to gate stack on Si channels. The mobility enhancement afforded intrinsically by the SiGe channel (60%) is further increased by a Si cap (40%) process, resulting in a combined ∼100% enhancement over Si channels. The Si cap process also mitigates the low potential barrier issues of SiGe channels, which are major causes of the high off-state current of small bandgap energy SiGe pMOSFETs, by improving gate control over the channel.