{"title":"时序电路测试模式自动生成的有效故障排序","authors":"P. A. Krauss, M. Henftling","doi":"10.1109/ATS.1994.367244","DOIUrl":null,"url":null,"abstract":"This paper analyzes fault dependency in sequential circuits to accelerate parallel automatic test pattern generation (ATPG). We present the new algorithms improved fault collapsing and fault arranging for an efficient fault ordering to speedup ATPG. Experimental results obtained for sequential and fault parallel ATPG show the efficiency of the proposed methods.<<ETX>>","PeriodicalId":182440,"journal":{"name":"Proceedings of IEEE 3rd Asian Test Symposium (ATS)","volume":"2 2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"Efficient fault ordering for automatic test pattern generation for sequential circuits\",\"authors\":\"P. A. Krauss, M. Henftling\",\"doi\":\"10.1109/ATS.1994.367244\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper analyzes fault dependency in sequential circuits to accelerate parallel automatic test pattern generation (ATPG). We present the new algorithms improved fault collapsing and fault arranging for an efficient fault ordering to speedup ATPG. Experimental results obtained for sequential and fault parallel ATPG show the efficiency of the proposed methods.<<ETX>>\",\"PeriodicalId\":182440,\"journal\":{\"name\":\"Proceedings of IEEE 3rd Asian Test Symposium (ATS)\",\"volume\":\"2 2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-11-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of IEEE 3rd Asian Test Symposium (ATS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.1994.367244\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE 3rd Asian Test Symposium (ATS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.1994.367244","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Efficient fault ordering for automatic test pattern generation for sequential circuits
This paper analyzes fault dependency in sequential circuits to accelerate parallel automatic test pattern generation (ATPG). We present the new algorithms improved fault collapsing and fault arranging for an efficient fault ordering to speedup ATPG. Experimental results obtained for sequential and fault parallel ATPG show the efficiency of the proposed methods.<>