用于背板互连的4-PAM自适应模拟均衡器

2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT) Pub Date : 2008-04-23 DOI:10.1109/VDAT.2008.4542447

Yen-Chuan Huang, Qui-Ting Chen, Tai-Cheng Lee

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引用次数: 5

摘要

数据传输速率的不断提高对用于背板物理层链路接口的电子电路提出了重大挑战。随着数据速率超过Gb/s，码间干扰(ISI)成为影响接收信号质量的关键问题，限制了信道上可实现的传输速度和距离。提出了一种4-PAM(脉冲调幅)自适应模拟均衡器，利用和反馈滤波器(SFF)对FR-4 PCB背板互连进行补偿，降低了传统模拟前馈均衡器(FFE)的设计要求。模拟均衡器采用0.13 μ m数字CMOS技术制作，可恢复在FR-4 PCB铜通道上传输的14gb /s随机数据。

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A 4-PAM adaptive analog equalizer for backplane interconnections

Increasing of data rate has created a major challenge for electronic circuits used at the interface of the backplane physical layer links. As the data rate increases above Gb/s, intersymbol interference (ISI) becomes a critical issue in received signal quality, limiting the achievable transmission speed and distance over channels. A 4-PAM (pulse amplitude modulation) adaptive analog equalizer is proposed to compensate the FR-4 PCB backplane interconnections by using a sum- feedback filter (SFF), relaxing the design requirement of the conventional analog feed-forward equalizers (FFE). Fabricated in a 0.13- mum digital CMOS technology, the analog equalizer recovers 14 Gb/s random data transmitted over FR-4 PCB copper channels.

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来源期刊

2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT)

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