利用(U/sub /=300 V)电离束的电容沉积Pb/p-Si[100]肖特基结

B. Cvikl, D. Korosak
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引用次数: 0

摘要

室温下的C-V特性,在电离簇束沉积(ICB)金属/p-Si[100],金属=Pb和Ag,肖特基结的反向偏置电压U/sub / r/周围有明显的最大值,可以用金属/富金属夹层/p-Si衬底结构模型来解释。结果表明,当结合(假设与偏置电压无关)过量界面电荷密度/spl sigma/,结合金属富集半导体区域内空间受限的深部金属杂质水平,得到这种结构的耗尽层电容C,可以成功地描述在这些ICB U/sub /=300 V肖特基结上测量的低频C-V数据。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
On capacitance of (U/sub a/=300 V) ionized cluster beam deposited Pb/p-Si[100] Schottky junction
The room temperature C-V characteristics, exhibiting the distinct maxima around the reverse biased voltage, U/sub r/, of ionized cluster beam deposited (ICB) metal/p-Si[100], metal=Pb and Ag, Schottky junctions, are interpreted in terms of the model of metal/metal-enriched interlayer/p-Si substrate structure. It is shown, that the resultant depletion layer capacitance, C, of such a structure, when derived by incorporating the (assumed biased voltage independent) excess interface charge density, /spl sigma/, in conjunction with the spatially confined deep lying metal impurity levels within the metal enriched semiconductor region, could successfully describe the low frequency C-V data, as measured on these ICB U/sub a/=300 V Schottky junctions.
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