{"title":"光失调对横向DMOS器件热载流子可靠性的影响","authors":"D. Brisbin, P. Lindorfer, P. Chaparala","doi":"10.1109/RELPHY.2007.369941","DOIUrl":null,"url":null,"abstract":"Power management devices often require operation in the 20 V to 30 V range. A common choice for the power MOS driver is an n-channel lateral DMOS (N-LDMOS) device. An advantage of N-LDMOS device is that it can easily be integrated within existing technologies to handle a wide range of operating voltages without significant process changes. Because of the high voltages applied to the N-LDMOS device hot carrier (HC) degradation is a real reliability concern. In high power applications N-LDMOS devices are often implemented in transistor arrays where the basic cell is a dual gate single drain device. This paper focuses on understanding unusual N-LDMOS HC results in which single gate devices had significantly better HC performance than dual gate devices.","PeriodicalId":433104,"journal":{"name":"2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual","volume":"383 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Photo Misalignment Impact on the Hot Carrier Reliability of Lateral DMOS Devices\",\"authors\":\"D. Brisbin, P. Lindorfer, P. Chaparala\",\"doi\":\"10.1109/RELPHY.2007.369941\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Power management devices often require operation in the 20 V to 30 V range. A common choice for the power MOS driver is an n-channel lateral DMOS (N-LDMOS) device. An advantage of N-LDMOS device is that it can easily be integrated within existing technologies to handle a wide range of operating voltages without significant process changes. Because of the high voltages applied to the N-LDMOS device hot carrier (HC) degradation is a real reliability concern. In high power applications N-LDMOS devices are often implemented in transistor arrays where the basic cell is a dual gate single drain device. This paper focuses on understanding unusual N-LDMOS HC results in which single gate devices had significantly better HC performance than dual gate devices.\",\"PeriodicalId\":433104,\"journal\":{\"name\":\"2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual\",\"volume\":\"383 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RELPHY.2007.369941\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RELPHY.2007.369941","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Photo Misalignment Impact on the Hot Carrier Reliability of Lateral DMOS Devices
Power management devices often require operation in the 20 V to 30 V range. A common choice for the power MOS driver is an n-channel lateral DMOS (N-LDMOS) device. An advantage of N-LDMOS device is that it can easily be integrated within existing technologies to handle a wide range of operating voltages without significant process changes. Because of the high voltages applied to the N-LDMOS device hot carrier (HC) degradation is a real reliability concern. In high power applications N-LDMOS devices are often implemented in transistor arrays where the basic cell is a dual gate single drain device. This paper focuses on understanding unusual N-LDMOS HC results in which single gate devices had significantly better HC performance than dual gate devices.