{"title":"低功耗和低面积CMOS电容倍增器","authors":"G. Bonteanu, A. Cracan","doi":"10.1109/SMICND.2018.8539846","DOIUrl":null,"url":null,"abstract":"A low power and low area voltage mode CMOS capacitance multiplication technique is presented. The multiplication factor is conveniently given by the transconductance ratio of two transistors, thereby improving the immunity to process and temperature variations. A low power wide range adjustable relaxation oscillator is presented as application.","PeriodicalId":247062,"journal":{"name":"2018 International Semiconductor Conference (CAS)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Low Power and Low Area CMOS Capacitance Multiplier\",\"authors\":\"G. Bonteanu, A. Cracan\",\"doi\":\"10.1109/SMICND.2018.8539846\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low power and low area voltage mode CMOS capacitance multiplication technique is presented. The multiplication factor is conveniently given by the transconductance ratio of two transistors, thereby improving the immunity to process and temperature variations. A low power wide range adjustable relaxation oscillator is presented as application.\",\"PeriodicalId\":247062,\"journal\":{\"name\":\"2018 International Semiconductor Conference (CAS)\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 International Semiconductor Conference (CAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMICND.2018.8539846\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Semiconductor Conference (CAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMICND.2018.8539846","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Low Power and Low Area CMOS Capacitance Multiplier
A low power and low area voltage mode CMOS capacitance multiplication technique is presented. The multiplication factor is conveniently given by the transconductance ratio of two transistors, thereby improving the immunity to process and temperature variations. A low power wide range adjustable relaxation oscillator is presented as application.