Chang-Chun Lee, Tsung-Fu Yang, Kuo-Shu Kao, Ren-Chin Cheng, C. Zhan
{"title":"使用晶圆级底填料在细间距封装中堆叠薄芯片的Cu/Ni/SnAg微凸点组装分析","authors":"Chang-Chun Lee, Tsung-Fu Yang, Kuo-Shu Kao, Ren-Chin Cheng, C. Zhan","doi":"10.1109/EMAP.2012.6507854","DOIUrl":null,"url":null,"abstract":"To enhance assembly quality and mechanical reliability of microbumps during both stacking process of multi thin chips and temperature cycling tests, a novel fabricated technique of wafer level underfill (WLUF) is proposed to resolve the foregoing concerned problem. However, the occurrence of a serious warped condition or gap reduction between stacked chips is observed through the assembly procedures of WLUF with a thermal-compression approach. This is harmful to the objective achievements of a three-dimensional integrated circuits package. In order to address this urgent issue, the research presents a process-oriented stress simulation based on finite element method to find the root cause as compared with experimental data. The analytic results indicate that the major influenced factors inducing thermo-mechanical stress within a chip-on-chip package are resulted from a huge temperature difference in WLUF process and mechanical properties of WLUF, respectively. It is found that the use of WLUF with a low coefficient of thermal expansion and a low Young's modulus is beneficial to reduce plastic strain of critical microbumps. Moreover, through the utilization of layout designs of microbumps array with the arrangements of dummy joints, the significant improvements of co-planarity in a whole packaging structure could be achieved. The simulated predictions point out that as more than three of dummy joints is put nearby the outermost microbump, a warpage variation between the packaging center and chip edge at the top surface of a package under a load of a 2.0 kg bonding force would be smaller than 70 nm. At the same time, a minimum equivalent plastic strain of ∼0.87 % generated on the critical microbump is obtained during a thermal cycling load.","PeriodicalId":182576,"journal":{"name":"2012 14th International Conference on Electronic Materials and Packaging (EMAP)","volume":"332 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Assembly analysis of Cu/Ni/SnAg microbump for stacking thin chips in a fine pitch package using a wafer-level underfill\",\"authors\":\"Chang-Chun Lee, Tsung-Fu Yang, Kuo-Shu Kao, Ren-Chin Cheng, C. Zhan\",\"doi\":\"10.1109/EMAP.2012.6507854\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"To enhance assembly quality and mechanical reliability of microbumps during both stacking process of multi thin chips and temperature cycling tests, a novel fabricated technique of wafer level underfill (WLUF) is proposed to resolve the foregoing concerned problem. However, the occurrence of a serious warped condition or gap reduction between stacked chips is observed through the assembly procedures of WLUF with a thermal-compression approach. This is harmful to the objective achievements of a three-dimensional integrated circuits package. In order to address this urgent issue, the research presents a process-oriented stress simulation based on finite element method to find the root cause as compared with experimental data. The analytic results indicate that the major influenced factors inducing thermo-mechanical stress within a chip-on-chip package are resulted from a huge temperature difference in WLUF process and mechanical properties of WLUF, respectively. It is found that the use of WLUF with a low coefficient of thermal expansion and a low Young's modulus is beneficial to reduce plastic strain of critical microbumps. Moreover, through the utilization of layout designs of microbumps array with the arrangements of dummy joints, the significant improvements of co-planarity in a whole packaging structure could be achieved. The simulated predictions point out that as more than three of dummy joints is put nearby the outermost microbump, a warpage variation between the packaging center and chip edge at the top surface of a package under a load of a 2.0 kg bonding force would be smaller than 70 nm. At the same time, a minimum equivalent plastic strain of ∼0.87 % generated on the critical microbump is obtained during a thermal cycling load.\",\"PeriodicalId\":182576,\"journal\":{\"name\":\"2012 14th International Conference on Electronic Materials and Packaging (EMAP)\",\"volume\":\"332 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 14th International Conference on Electronic Materials and Packaging (EMAP)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EMAP.2012.6507854\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 14th International Conference on Electronic Materials and Packaging (EMAP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EMAP.2012.6507854","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Assembly analysis of Cu/Ni/SnAg microbump for stacking thin chips in a fine pitch package using a wafer-level underfill
To enhance assembly quality and mechanical reliability of microbumps during both stacking process of multi thin chips and temperature cycling tests, a novel fabricated technique of wafer level underfill (WLUF) is proposed to resolve the foregoing concerned problem. However, the occurrence of a serious warped condition or gap reduction between stacked chips is observed through the assembly procedures of WLUF with a thermal-compression approach. This is harmful to the objective achievements of a three-dimensional integrated circuits package. In order to address this urgent issue, the research presents a process-oriented stress simulation based on finite element method to find the root cause as compared with experimental data. The analytic results indicate that the major influenced factors inducing thermo-mechanical stress within a chip-on-chip package are resulted from a huge temperature difference in WLUF process and mechanical properties of WLUF, respectively. It is found that the use of WLUF with a low coefficient of thermal expansion and a low Young's modulus is beneficial to reduce plastic strain of critical microbumps. Moreover, through the utilization of layout designs of microbumps array with the arrangements of dummy joints, the significant improvements of co-planarity in a whole packaging structure could be achieved. The simulated predictions point out that as more than three of dummy joints is put nearby the outermost microbump, a warpage variation between the packaging center and chip edge at the top surface of a package under a load of a 2.0 kg bonding force would be smaller than 70 nm. At the same time, a minimum equivalent plastic strain of ∼0.87 % generated on the critical microbump is obtained during a thermal cycling load.