Monika Sharma, R. Narang, M. Saxena, Mridula Gupta
{"title":"界面电荷对InGaN和InGaAs基无掺杂TFET的影响及其电路分析","authors":"Monika Sharma, R. Narang, M. Saxena, Mridula Gupta","doi":"10.1109/icee50728.2020.9776962","DOIUrl":null,"url":null,"abstract":"In this paper, the doping-less tunnel field-effect transistor with its gate-engineered structures is studied in which the effect of interface charges and its circuit performance are presented. The charge plasma method is used for reinforcing the desired doping by depositing the metal layer of required work-function on it, which makes it free from random doping fluctuations. While, the deposition of the oxide layer on the semiconducting bar leads to the formation of dangling bonds on the surface, to include the effect of breakage of bonds on the interface both positive and negative interface charges are considered. The comparison of different materials with different interface charges shows the improvement in the characteristics for InGaAs DL TFET. Further, the gate engineered structures are compared for InGaN and InGaAs based DL TFET, and among these InGaAs based DL TFET shows higher ON-current characteristics for positive interface charges. The CV and transient behavior of all the structures are also studied. Among all the structures studied for DC and RF performance estimation shows InGaAs HD-HG DL TFET as the most prominent structure for digital circuits because of its lower miller capacitance. Hence, it can be used for faster switching circuits and sensing applications.","PeriodicalId":436884,"journal":{"name":"2020 5th IEEE International Conference on Emerging Electronics (ICEE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Effect of Interface Charges on InGaN and InGaAs Based Dopingless TFET and its Circuit Analysis\",\"authors\":\"Monika Sharma, R. Narang, M. Saxena, Mridula Gupta\",\"doi\":\"10.1109/icee50728.2020.9776962\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, the doping-less tunnel field-effect transistor with its gate-engineered structures is studied in which the effect of interface charges and its circuit performance are presented. The charge plasma method is used for reinforcing the desired doping by depositing the metal layer of required work-function on it, which makes it free from random doping fluctuations. While, the deposition of the oxide layer on the semiconducting bar leads to the formation of dangling bonds on the surface, to include the effect of breakage of bonds on the interface both positive and negative interface charges are considered. The comparison of different materials with different interface charges shows the improvement in the characteristics for InGaAs DL TFET. Further, the gate engineered structures are compared for InGaN and InGaAs based DL TFET, and among these InGaAs based DL TFET shows higher ON-current characteristics for positive interface charges. The CV and transient behavior of all the structures are also studied. Among all the structures studied for DC and RF performance estimation shows InGaAs HD-HG DL TFET as the most prominent structure for digital circuits because of its lower miller capacitance. Hence, it can be used for faster switching circuits and sensing applications.\",\"PeriodicalId\":436884,\"journal\":{\"name\":\"2020 5th IEEE International Conference on Emerging Electronics (ICEE)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-11-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 5th IEEE International Conference on Emerging Electronics (ICEE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/icee50728.2020.9776962\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 5th IEEE International Conference on Emerging Electronics (ICEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/icee50728.2020.9776962","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Effect of Interface Charges on InGaN and InGaAs Based Dopingless TFET and its Circuit Analysis
In this paper, the doping-less tunnel field-effect transistor with its gate-engineered structures is studied in which the effect of interface charges and its circuit performance are presented. The charge plasma method is used for reinforcing the desired doping by depositing the metal layer of required work-function on it, which makes it free from random doping fluctuations. While, the deposition of the oxide layer on the semiconducting bar leads to the formation of dangling bonds on the surface, to include the effect of breakage of bonds on the interface both positive and negative interface charges are considered. The comparison of different materials with different interface charges shows the improvement in the characteristics for InGaAs DL TFET. Further, the gate engineered structures are compared for InGaN and InGaAs based DL TFET, and among these InGaAs based DL TFET shows higher ON-current characteristics for positive interface charges. The CV and transient behavior of all the structures are also studied. Among all the structures studied for DC and RF performance estimation shows InGaAs HD-HG DL TFET as the most prominent structure for digital circuits because of its lower miller capacitance. Hence, it can be used for faster switching circuits and sensing applications.