VLSI可靠性仿真集成TCAD系统

Jin-Kyu Park, Tae-Soo Park, Sang-Hoon Lee, Chang-hoon Choi, Kyung-Ho Kim
{"title":"VLSI可靠性仿真集成TCAD系统","authors":"Jin-Kyu Park, Tae-Soo Park, Sang-Hoon Lee, Chang-hoon Choi, Kyung-Ho Kim","doi":"10.1109/SISPAD.1996.865316","DOIUrl":null,"url":null,"abstract":"SANTA is a useful environment to both VLSI technology developer and circuit designers who are not familiar with complex TCAD tools. Through the ESD protection application, we find that a well selected device width and length can reduce process steps without loosing performance threshold.","PeriodicalId":341161,"journal":{"name":"1996 International Conference on Simulation of Semiconductor Processes and Devices. SISPAD '96 (IEEE Cat. No.96TH8095)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An integrated TCAD system for VLSI reliability simulation\",\"authors\":\"Jin-Kyu Park, Tae-Soo Park, Sang-Hoon Lee, Chang-hoon Choi, Kyung-Ho Kim\",\"doi\":\"10.1109/SISPAD.1996.865316\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"SANTA is a useful environment to both VLSI technology developer and circuit designers who are not familiar with complex TCAD tools. Through the ESD protection application, we find that a well selected device width and length can reduce process steps without loosing performance threshold.\",\"PeriodicalId\":341161,\"journal\":{\"name\":\"1996 International Conference on Simulation of Semiconductor Processes and Devices. SISPAD '96 (IEEE Cat. No.96TH8095)\",\"volume\":\"51 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-09-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1996 International Conference on Simulation of Semiconductor Processes and Devices. SISPAD '96 (IEEE Cat. No.96TH8095)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SISPAD.1996.865316\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1996 International Conference on Simulation of Semiconductor Processes and Devices. SISPAD '96 (IEEE Cat. No.96TH8095)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SISPAD.1996.865316","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

对于不熟悉复杂TCAD工具的VLSI技术开发人员和电路设计人员来说,SANTA是一个有用的环境。通过对静电放电保护的应用,我们发现选择合适的器件宽度和长度可以在不损失性能阈值的情况下减少工艺步骤。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An integrated TCAD system for VLSI reliability simulation
SANTA is a useful environment to both VLSI technology developer and circuit designers who are not familiar with complex TCAD tools. Through the ESD protection application, we find that a well selected device width and length can reduce process steps without loosing performance threshold.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信