I. Yamamoto, I. Honma, T. Yamamoto, K. Urabe, K. Inoue, Y. Takaishi, Y. Yamada, K. Tokunaga, R. Kubota, M. Hamada, Y. Kato
{"title":"高密度嵌入式dram的低温金属/ON/ hsg圆柱体电容器工艺","authors":"I. Yamamoto, I. Honma, T. Yamamoto, K. Urabe, K. Inoue, Y. Takaishi, Y. Yamada, K. Tokunaga, R. Kubota, M. Hamada, Y. Kato","doi":"10.1109/VLSIT.1999.799391","DOIUrl":null,"url":null,"abstract":"A logic-process-compatible low-temperature hemispherical grain (HSG) cylinder capacitor process with maximum process temperature below 700/spl deg/C is developed. Depletion in HSG-grains and top-electrodes due to decreasing thermal budget is effectively suppressed by phosphorus doping with PH/sub 3/-annealing and the use of metal plate-electrodes. By combining with the HSG grain size optimization, the low-temperature process with highly reliable oxynitride (ON) dielectrics can be applied to high density embedded DRAM cells down to 0.13 /spl mu/m design rules.","PeriodicalId":171010,"journal":{"name":"1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Low-temperature metal/ON/HSG-cylinder capacitor process for high density embedded DRAMs\",\"authors\":\"I. Yamamoto, I. Honma, T. Yamamoto, K. Urabe, K. Inoue, Y. Takaishi, Y. Yamada, K. Tokunaga, R. Kubota, M. Hamada, Y. Kato\",\"doi\":\"10.1109/VLSIT.1999.799391\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A logic-process-compatible low-temperature hemispherical grain (HSG) cylinder capacitor process with maximum process temperature below 700/spl deg/C is developed. Depletion in HSG-grains and top-electrodes due to decreasing thermal budget is effectively suppressed by phosphorus doping with PH/sub 3/-annealing and the use of metal plate-electrodes. By combining with the HSG grain size optimization, the low-temperature process with highly reliable oxynitride (ON) dielectrics can be applied to high density embedded DRAM cells down to 0.13 /spl mu/m design rules.\",\"PeriodicalId\":171010,\"journal\":{\"name\":\"1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325)\",\"volume\":\"75 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-06-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.1999.799391\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1999.799391","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Low-temperature metal/ON/HSG-cylinder capacitor process for high density embedded DRAMs
A logic-process-compatible low-temperature hemispherical grain (HSG) cylinder capacitor process with maximum process temperature below 700/spl deg/C is developed. Depletion in HSG-grains and top-electrodes due to decreasing thermal budget is effectively suppressed by phosphorus doping with PH/sub 3/-annealing and the use of metal plate-electrodes. By combining with the HSG grain size optimization, the low-temperature process with highly reliable oxynitride (ON) dielectrics can be applied to high density embedded DRAM cells down to 0.13 /spl mu/m design rules.