Gabriele Boschi, Elisa Spano, H. Grigoryan, Arun Kumar, Gurgen Harutunyan
{"title":"汽车和工业安全应用中的模对模测试和ECC错误缓解","authors":"Gabriele Boschi, Elisa Spano, H. Grigoryan, Arun Kumar, Gurgen Harutunyan","doi":"10.1109/ITC44778.2020.9325242","DOIUrl":null,"url":null,"abstract":"Two significant trends can be nowadays seen in automotive and industrial applications: an increase of the amount of data that is stored and elaborated by those systems, thus requiring bigger on-board DRAMs (Dynamic Random Access Memories), and the strict demands for reliability and safety. Safety is ruled by standards, that impose requirements for acceptable FIT rate–one of the most common metrics used for quantitatively evaluating the effects of such errors. It is then relevant to investigate the errors that can occur in DRAMs and propose mitigation techniques to deal with them. In this paper, die-to-die testing scenario is considered, and a methodology is described for mitigating the effects of errors by using well-known Error Correcting Codes (ECC). An advanced ECC solution is then presented along with the infrastructure needed for effectively testing DRAMs, including soft errors and permanent faults. The FIT rates calculations are finally considered, together with examples and case studies illustrating the effectiveness of the proposed solution.","PeriodicalId":251504,"journal":{"name":"2020 IEEE International Test Conference (ITC)","volume":"237 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Die-to-Die Testing and ECC Error Mitigation in Automotive and Industrial Safety Applications\",\"authors\":\"Gabriele Boschi, Elisa Spano, H. Grigoryan, Arun Kumar, Gurgen Harutunyan\",\"doi\":\"10.1109/ITC44778.2020.9325242\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Two significant trends can be nowadays seen in automotive and industrial applications: an increase of the amount of data that is stored and elaborated by those systems, thus requiring bigger on-board DRAMs (Dynamic Random Access Memories), and the strict demands for reliability and safety. Safety is ruled by standards, that impose requirements for acceptable FIT rate–one of the most common metrics used for quantitatively evaluating the effects of such errors. It is then relevant to investigate the errors that can occur in DRAMs and propose mitigation techniques to deal with them. In this paper, die-to-die testing scenario is considered, and a methodology is described for mitigating the effects of errors by using well-known Error Correcting Codes (ECC). An advanced ECC solution is then presented along with the infrastructure needed for effectively testing DRAMs, including soft errors and permanent faults. The FIT rates calculations are finally considered, together with examples and case studies illustrating the effectiveness of the proposed solution.\",\"PeriodicalId\":251504,\"journal\":{\"name\":\"2020 IEEE International Test Conference (ITC)\",\"volume\":\"237 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE International Test Conference (ITC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ITC44778.2020.9325242\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE International Test Conference (ITC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ITC44778.2020.9325242","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Die-to-Die Testing and ECC Error Mitigation in Automotive and Industrial Safety Applications
Two significant trends can be nowadays seen in automotive and industrial applications: an increase of the amount of data that is stored and elaborated by those systems, thus requiring bigger on-board DRAMs (Dynamic Random Access Memories), and the strict demands for reliability and safety. Safety is ruled by standards, that impose requirements for acceptable FIT rate–one of the most common metrics used for quantitatively evaluating the effects of such errors. It is then relevant to investigate the errors that can occur in DRAMs and propose mitigation techniques to deal with them. In this paper, die-to-die testing scenario is considered, and a methodology is described for mitigating the effects of errors by using well-known Error Correcting Codes (ECC). An advanced ECC solution is then presented along with the infrastructure needed for effectively testing DRAMs, including soft errors and permanent faults. The FIT rates calculations are finally considered, together with examples and case studies illustrating the effectiveness of the proposed solution.